Senior SoC RAS Architect: Resilience & Diagnostics

NVIDIA AI; Eugene (OR); On-site; USD 184,000 - 288,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA is seeking a Senior Hardware Architect to lead SoC-level RAS hardware architecture for Tegra processing platforms. You will own RAS features from concept to production readiness, collaborating with design, verification, firmware, software, and validation teams to ensure resiliency, observability, and serviceability across CPUs, interconnects, and memory systems.

Space and radiation-aware aspects are considered, with focus on fault detection, recovery, and diagnostic tooling.

Qualifications

• MS or PhD in computer engineering, electrical engineering, or equivalent experience
• 8+ years of SoC architecture, design, verification, reliability, silicon validation, or related hardware development experience
• Strong understanding of RAS in the SoC context including fault detection, correction, telemetry, recovery, and serviceability

Responsibilities

• Define and drive SoC-level RAS hardware architecture across CPUs, interconnects, memory systems, IOs, safety islands, firmware interfaces, and platform components
• Own RAS features from concept through architecture specification, micro-architectural alignment, RTL implementation support, design verification, silicon validation, debug, and production readiness
• Plan and review verification and validation strategies for RAS mechanisms including error injection and resiliency modeling
• Collaborate with design, verification, firmware, software, and platform teams to ensure RAS features are implementable, verifiable, and aligned with system requirements

Skills

RAS

SoC architecture

Fault injection

Silicon validation

Education

MS or PhD in computer engineering or electrical engineering

Tools

SystemC

C/C++

Python

Job description

NVIDIA is seeking a Senior Hardware Architect to lead SoC-level RAS hardware architecture for Tegra processing platforms. You will own RAS features from concept to production readiness, collaborating with design, verification, firmware, software, and validation teams to ensure resiliency, observability, and serviceability across CPUs, interconnects, and memory systems.

Space and radiation-aware aspects are considered, with focus on fault detection, recovery, and diagnostic tooling.