Senior SoC Power & Performance Architect, Low-Power Expert

Ambiq

Austin (TX)

On-site

USD 180,000 - 240,000

Full time

12 days ago
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Job summary

Ambiq in Austin, TX is seeking a Sr. Staff Power & Performance Architect to shape the architecture behind industry‑leading ultra‑low‑power SoCs.

You will drive power budgeting, analysis, modeling, and debug from early architecture through silicon correlation, defining practical guidance for power management, clocks, fabric, and embedded behavior. You will lead architectural debugging, automate power modeling, and translate silicon learnings into actionable architecture updates while

Qualifications

  • Hands‑on power/performance analysis and debugging experience.
  • Experience with power‑aware flows and budget development.
  • Ability to write architecture/microarchitecture specs.

Responsibilities

  • Execute power and performance analysis across pre‑silicon and post‑silicon stages.
  • Build and maintain power budgets for SoCs and subsystems.
  • Lead architectural debug of power anomalies in sim/RTL/ silicon.
  • Develop automation for power modeling and reporting using Python/TCL.
  • Collaborate across hardware, software, design, and field teams.

Skills

Power analysis
Performance analysis
Budgeting power
Python scripting
TCL scripting
Architecture specifications
Strong communication
Cross‑functional collaboration
Cadence Genus tooling
Power‑aware simulation
UPF/Power modeling

Education

BS in Electrical Engineering/CS/related
MS/PhD preferred

Tools

Cadence Genus
Confluence
SharePoint
JIRA
Git

Job description

Ambiq in Austin, TX is seeking a Sr. Staff Power & Performance Architect to shape the architecture behind industry‑leading ultra‑low‑power SoCs.

You will drive power budgeting, analysis, modeling, and debug from early architecture through silicon correlation, defining practical guidance for power management, clocks, fabric, and embedded behavior. You will lead architectural debugging, automate power modeling, and translate silicon learnings into actionable architecture updates while

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