Senior SoC Post-Silicon Validation Architect

Mundi; Los Angeles (CA); On-site; USD 170,000 - 250,000; Full time

Job summary

K2 Space is seeking a hands-on Senior Post-Silicon Validation Engineer to own silicon bring-up, characterization, and system-level validation of complex mixed-signal SoCs, while enabling a smooth transition from validated silicon into product integration.

You will define the validation strategy, build our test and validation capability from the ground up, and lead execution from first silicon through product readiness.

Qualifications

• BS/MS in Electrical Engineering, Computer Engineering, or equivalent experience.
• 5+ years of post-silicon validation, SoC bring-up, silicon characterization, or related experience.
• Hands-on experience bringing up complex mixed-signal SoCs/ASICs and transitioning silicon into product/system integration.
• Hands-on experience with lab test and measurement equipment, including oscilloscopes, spectrum/signal analyzers, vector signal generators, network analyzers, logic analyzers, power supplies, and related RF/mixed-signal instrumentation.
• Strong understanding of SoC architecture and working knowledge of RF/analog and mixed-signal circuits.
• Strong hardware/software debug skills spanning silicon, RTL, firmware, board, and systems.
• Experience building silicon validation labs, test infrastructure, and automated measurement environments.
• Experience validating DSP, calibration, or signal-processing functionality in silicon.
• Strong Python/scripting skills for lab automation, instrumentation, and data analysis.
• Experience with embedded C/C++, JTAG, SPI, UART, and register-level debug.
• Ability to lead cross-functional bring-up while remaining deeply hands-on in the lab.

Responsibilities

• Own post-silicon validation strategy, test planning, execution, coverage, and sign-off.
• Lead first silicon bring-up across power, clocks, debug interfaces, processor/memory subsystems, peripherals, and high-speed interfaces.
• Define and execute the validation strategy and readiness criteria needed to enable product integration, ensuring silicon, firmware, test infrastructure, and system interfaces are ready for integration.
• Own system-level test planning and execution, including functional, performance, stress, and corner-case testing.
• Help build the test and validation lab from the ground up, including equipment, infrastructure, test setups, and automated characterization and regression environments.
• Partner with RF/analog and mixed-signal designers on characterization of RF chains, PLLs, ADCs/DACs, clocking, and power.
• Work closely with systems/DSP teams to validate DSP and calibration algorithms on silicon and correlate measured performance with models and simulations.
• Partner with FPGA, firmware, RTL/DV, hardware, and systems teams to accelerate silicon bring-up, enable product integration, and drive end-to-end validation.
• Drive cross-functional debug across silicon, firmware, RTL, package, board, and system boundaries.
• Build reusable automation for instrumentation control, data collection, analysis, regression, and reporting.
• Drive silicon issues from discovery through root cause, workaround, and resolution.

Job description

K2 Space is seeking a hands-on Senior Post-Silicon Validation Engineer to own silicon bring-up, characterization, and system-level validation of complex mixed-signal SoCs, while enabling a smooth transition from validated silicon into product integration.

You will define the validation strategy, build our test and validation capability from the ground up, and lead execution from first silicon through product readiness.