Senior Silicon Design Engineer – ASIC & IC Architecture

AMD; Folsom (CA); On-site; USD 120,000 - 180,000; Full time

Job summary

AMD in California is hiring a Silicon Design Engineer (SMTS) to design, verify, and test ASICs for advanced semiconductor products. You will lead architecture and module interfaces, drive timing and power optimizations, and collaborate with cross-functional teams across design, verification, and layout.

Requires a Master’s degree or equivalent in VLSI/electronics and 4+ years of relevant experience. Strong knowledge of signal integrity, analog/digital design, and Front-End EDA tools is expected.

Qualifications

• Master’s or Bachelor’s in VLSI/Microelectronics or related field with years of progressive experience.
• Four (4) years experience in the job offered or closely related engineering role.
• Alternate combination: Bachelor’s degree and 6 years experience in the field.

Responsibilities

• Research, design, develop, and test electronic components and systems for semiconductor manufacturing.
• Lead definition, design, verification, and documentation for ASIC development.
• Determine architecture design, logic design, and system simulation; define module interfaces.
• Lead multidimensional design including IC layout; evaluate process flow from high-level designs to timing and power.
• Collaborate with cross-functional teams to address significant technical challenges.
• Exercise independent judgment to select methods and evaluation criteria with minimal supervision.

Skills

Signal integrity

Electromagnetic and Transmission line

Digital and Analog Circuit Design

Validation and debugging

Product development cycles

Education

Master’s degree in VLSI and Microelectronics

Bachelor’s degree in VLSI and Microelectronics with 6 years experience

Tools

Front-End EDA tools

Job description

AMD in California is hiring a Silicon Design Engineer (SMTS) to design, verify, and test ASICs for advanced semiconductor products. You will lead architecture and module interfaces, drive timing and power optimizations, and collaborate with cross-functional teams across design, verification, and layout.

Requires a Master’s degree or equivalent in VLSI/electronics and 4+ years of relevant experience. Strong knowledge of signal integrity, analog/digital design, and Front-End EDA tools is expected.