Senior SI/PI Engineer, High-Speed Interconnects & Equity

Thomas To; Santa Clara (CA); On-site; USD 136,000 - 265,000; Full time

Benefits offered by this job

Equity

Job summary

NVIDIA is seeking a Senior Signal & Power Integrity Engineer in the United States (Santa Clara area). You will craft SI solutions for complex system designs, model via/connector behavior in 3D EM tools, and run system-level simulations for high-speed interfaces including PCIe5, NVLink, USB4, and GDDR6.

Responsibilities include improving SI models from lab data, creating layout SI guidelines, and performing post-layout extractions.

Qualifications

• BS/MS-Electrical Engineering or equivalent experience with 3+ years of industry experience.
• Strong technical background in applied electromagnetics, transmission line theory and signal processing.
• SI work on signaling standards like PCIe, USB, SATA, HDMI, HBM, DDR5, GDDR6, LPDDR5X, etc.
• Hands on use of 3-D modeling tools like ANSYS HFSS/Q3D, 2.5-D with ANSYS SIWAVE or similar and 2D such as Ansys2D.
• Familiarity with a system level timing or loss budget including silicon, package and board impairments.
• Familiarity with use of VNA, TDR, DSO, ParBERT and use of tools like ADS, Ansys Designer, JMP, Matlab, Cadence Allegro.

Responsibilities

• Craft creative Signal Integrity solutions to complex system design problems.
• Modeling and optimization of vias, connectors, sockets, breakouts and system components in 3D EM tools.
• System-level signal integrity simulations of high-speed interfaces like NVlink 200Gbs+, USB-4, PCIe5, GDDR6, LP5X.
• Improve SI models using lab data and tool updates.
• Create and review substrate and board layout SI guidelines; post-layout SI extractions.
• Automate simulations and visualize data using JMP, MATLAB or similar.
• Collaborate cross-functionally to optimize package, PCB, ASIC and mixed-signal circuits.

Skills

Signal Integrity

Electromagnetics

Timings / Budgeting

Interconnect design

Education

BS/MS-Electrical Engineering or equivalent

Tools

ANSYS HFSS

ANSYS Q3D

ANSYS SIWAVE

JMP

MATLAB

ADS

Cadence Allegro

ParBERT

Job description

NVIDIA is seeking a Senior Signal & Power Integrity Engineer in the United States (Santa Clara area). You will craft SI solutions for complex system designs, model via/connector behavior in 3D EM tools, and run system-level simulations for high-speed interfaces including PCIe5, NVLink, USB4, and GDDR6.

Responsibilities include improving SI models from lab data, creating layout SI guidelines, and performing post-layout extractions.