Senior RTL Engineer, CPU Power

Google LLC

Mountain View (CA)

On-site

USD 163,000 - 236,000

Full time

18 hours ago
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Benefits offered by this job

Equity
Bonus target 15%

Job summary

Google LLC in Mountain View, CA seeks a senior engineer to push the boundaries of custom silicon that powers Google's consumer products. You will shape next-gen hardware experiences with a focus on performance, efficiency, and integration across CPU, RTL, and power domains.

The role emphasizes in-person collaboration, advanced power modeling, and close work with SoC teams to deliver cutting-edge energy-efficient silicon solutions.

Qualifications

  • Bachelor's degree in electrical/computer engineering or related field, or equivalent practical experience.
  • 8 years of RTL design experience using Verilog or SystemVerilog.
  • Experience with low-power digital design methodologies.

Responsibilities

  • Own and drive activities related to CPU architecture and system-level energy modeling, and conduct power analysis for performance and efficiency.
  • Develop novel power analysis techniques and tooling to improve battery life estimation and energy efficiency of CPUs.
  • Perform RTL and gate-level data mining to define micro-architectural transactions for high-level power estimation.
  • Collaborate with the SoC and CPU Power Team on power projections and workload profiling for high-traffic workloads.
  • Perform workload analysis for battery life and define tests for power analysis and optimization.

Skills

RTL design (Verilog/SV)
Low-power design
CPU benchmarking
Power management

Education

Bachelor's degree in EE/CE/CS or related field

Tools

PTPX
Ansys Power Artist
Synopsys Prime Power

Job description

corporate_fare Google place Mountain View, CA, USA

X In most instances, this position requires in-person interviews as part of the hiring process.

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 8 years of experience in RTL (Register Transfer Level) design using Verilog or SystemVerilog.
  • Experience with low-power digital design methodologies.
Preferred qualifications:
  • 3 years of experience in RTL design and low-power design techniques.
  • Experience with power management, retention, and DVFS.
  • Experience with CPU benchmarking, performance analysis, and competitive study.
  • Experience with modern processor microarchitecture and related technologies and algorithms, through academic projects or industry experience.
  • Knowledge of programming languages, such as C, C++, and Python.
  • Expertise in vendor tools such as PTPX, Ansys Power Artist, Synopsys Prime Power, etc.
About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You’ll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google’s direct-to-consumer products. You’ll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits

Learn more about benefits at Google .

  • Own and drive multiple activities related to CPU architecture and system-level energy modeling, competitive performance and power analysis, power optimization, simulation, and rollups.
  • Develop novel power analysis techniques, optimization engines, and other tooling solutions to improve battery life analysis and maximize the energy efficiency of our CPU.
  • Perform data mining analysis at the RTL and gate-level to define relevant micro-architectural transactions for high-level power estimation.
  • Collaborate with the SoC and CPU Power Team on power analysis, projections, and requirements for our CPU, including profiling the power of typical workloads on high traffic websites.
  • Perform workload analysis for battery life and define tests for power analysis and optimization.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google’s EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.

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