Senior Physical Design Engineer — AI-Driven FDE

Nicedesignjobs; San Francisco (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

OpenAI’s Forward Deployed Engineering team is seeking an experienced Physical Design Engineer for semiconductor deployments. You will serve as the SME for backend implementation workflows, defining feasible paths and advising customers on design trade‑offs.

Over time, you will grow into broader FDE ownership and deployment leadership. You will partner with cross‑functional teams to translate customer needs into concrete technical plans, develop evaluation datasets, and help shape AI‑assisted

Qualifications

• BS with 7+ years, MS with 5+ years in physical design, physical implementation, or backend signoff for complex ASIC/SoC programs
• Hands-on tapeout experience with floorplanning, place & route, CTS, timing closure, power analysis, physical verification, and signoff
• Deep familiarity with industry-standard EDA tools and flows for synthesis, PNR, STA, physical verification, equivalence checking, and power analysis
• Strong understanding of how physical design intersects with microarchitecture, RTL, verification, libraries/PDKs, and system‑level PPA trade‑offs
• Strong communication and collaboration skills for customer-facing and cross‑functional settings
• Consultative mindset to unblock teams and raise technical quality without direct ownership
• Strong scripting and automation skills in Python or Tcl
• Excited to grow beyond domain SME responsibilities into a broader Forward Deployed Engineering role

Responsibilities

• Serve as the physical design SME for semiconductor deployments, guiding backend implementation workflows, constraints, and opportunities
• Partner with FDEs during customer discovery and scoping to translate ambiguous pain points into clear solution hypotheses, success criteria, and technical plans
• Support customer-facing technical conversations as a trusted advisor, engaging credibly with technical leaders
• Help shape AI‑assisted solutions across physical design workflows, including floorplanning, place and route, clocking, timing closure, congestion, power, physical verification, and signoff
• Guide feasibility and integration decisions across the entire chip design lifecycle: design, verification, and physical design
• Partner with FDEs and customer SMEs to curate evaluation datasets, golden tasks, rubrics, and acceptance criteria for physical design use cases
• Build or guide lightweight prototypes, benchmarks, methodology experiments, and internal tools that validate opportunities and accelerate solution development
• Educate and mentor the broader FDE team on physical design concepts, implementation flows, EDA tooling, and key trade-offs
• Surface repeated customer signal to Product and Research to help shape roadmap, model behavior, and platform capabilities for semiconductor use cases
• Progressively take on broader FDE responsibilities, including customer discovery, solution architecture, prototype development, production deployment, and ownership of technical workstreams

Skills

Physical design

ASIC/SoC signoff

Floorplanning

Place & route

CTS

Timing closure

Power analysis

EDA tools

Scripting (Python/Tcl)

Customer-facing

Education

BS in Electrical/CS

MS in EE/CS (preferred)

Tools

EDA tool suites

Python scripting

Tcl scripting

Job description

OpenAI’s Forward Deployed Engineering team is seeking an experienced Physical Design Engineer for semiconductor deployments. You will serve as the SME for backend implementation workflows, defining feasible paths and advising customers on design trade‑offs.

Over time, you will grow into broader FDE ownership and deployment leadership. You will partner with cross‑functional teams to translate customer needs into concrete technical plans, develop evaluation datasets, and help shape AI‑assisted