Senior Photonics Laser & SOA Designer

Intel; Santa Clara (CA); On-site; USD 142,000 - 269,000; Full time

Job summary

Intel is seeking a Senior Laser Designer in Santa Clara to lead simulation, design, and development of advanced photonics components for data centers and AI. You will design DFB lasers and semiconductor optical amplifiers, perform tolerance analyses, and collaborate across disciplines to ensure robust integration into system-level designs.

The role emphasizes test chip execution, modeling methodologies, and potential IP development, with opportunities to influence next-generation optical

Qualifications

• Master's degree with 3+ years of experience or PhD with 1+ years of experience.
• Proven expertise in designing, simulating, and analyzing photonics components including DFB lasers and SOAs.

Responsibilities

• Design, simulate, and develop photonics components such as DFB lasers and semiconductor optical amplifiers.
• Perform tolerance analysis and optimize components for performance, power efficiency, area, and reliability.
• Collaborate with interdisciplinary teams to ensure integration of photonics into system designs.
• Lead test chip execution including chip design, layout, tape-out, test and validation.
• Analyze test data to identify performance gaps and propose improvements.
• Develop and implement advanced photonics modeling methodologies.
• Lead research initiatives on novel photonics technologies and IP development.

Skills

Photonic design

DFB lasers

Semiconductor optical amplifiers

Simulation

Tolerance analysis

Education

Master7s degree in Electrical Engineering, Physics, Optical Science

PhD with 1+ year experience

Tools

Cadence

KLayout

MATLAB

Python

Job description

Intel is seeking a Senior Laser Designer in Santa Clara to lead simulation, design, and development of advanced photonics components for data centers and AI. You will design DFB lasers and semiconductor optical amplifiers, perform tolerance analyses, and collaborate across disciplines to ensure robust integration into system-level designs.

The role emphasizes test chip execution, modeling methodologies, and potential IP development, with opportunities to influence next-generation optical