Senior PDK Engineer - DRC/LVS/PEX & AI Automation

GlobalFoundries inc.; New York (NY); On-site; USD 143,000 - 247,000; Full time

Job summary

GlobalFoundries is seeking a Design Enablement Engineer for DRC/LVS/PEX to develop, qualify, and deploy physical verification and parasitic extraction components for semiconductor PDKs. You will translate complex process requirements into robust verification flows and advance automation and AI/ML-based methodologies to improve PDK quality and design success.

The role involves creating production-quality rule decks, collaborating with process technology, design rules, and EDA teams, and

Qualifications

• Education: Bachelor's degree in Electrical Engineering, Computer Engineering, Microelectronics, Computer Science, Applied Physics, or a related field.
• Experience: Relevant experience in semiconductor PDK development, physical verification, EDA, IC physical design, parasitic extraction, or related field.
• Physical Verification: Experience with DRC and/or LVS rule development, coding, debug, or qualification.
• PEX: Understanding of parasitic resistance and capacitance extraction, interconnect modeling, layout-dependent effects, and their impact on circuit performance.
• EDA: Experience with industry-standard physical verification and/or extraction environments and rule-deck development methodologies.
• Programming/Automation: Experience with Python, Tcl, Perl, shell scripting for automation and data analysis.
• Travel: Up to 10%.

Responsibilities

• Develop, code, qualify, and maintain DRC, LVS, and PEX rule decks and associated PDK components.
• Translate process integration requirements, design rules, device definitions, and electrical models into production-quality verification solutions.
• Develop regression and test methodologies to validate rule-deck correctness and scalability.
• Analyze and debug complex DRC, LVS, and PEX issues and coordinate with cross-functional teams to resolve discrepancies.
• Collaborate with process technology, design rule, and EDA teams to ensure accurate semiconductor technology representation.
• Develop AI/ML-assisted methodologies for rule-deck development, test generation, and verification flow optimization.
• Optimize flows for accuracy, runtime, memory usage, scalability, and deployment into production environments.
• Support qualification, regression testing, documentation, and continuous improvement based on feedback.

Skills

Python

Tcl

Perl

Shell scripting

Education

Bachelor's degree in Electrical Engineering or related field

Tools

Siemens Calibre

Synopsys IC Validator

Cadence Pegasus/PVS

Job description

GlobalFoundries is seeking a Design Enablement Engineer for DRC/LVS/PEX to develop, qualify, and deploy physical verification and parasitic extraction components for semiconductor PDKs. You will translate complex process requirements into robust verification flows and advance automation and AI/ML-based methodologies to improve PDK quality and design success.

The role involves creating production-quality rule decks, collaborating with process technology, design rules, and EDA teams, and