Senior PDK Engineer

NVIDIA Gruppe; Santa Clara (CA); On-site; USD 168,000 - 264,500; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA Gruppe is looking for a highly motivated PDK Engineer for the Advanced Technologies Group in Santa Clara, California. In this role, you will manage the PDK development plan, download PDKs, perform checks, and collaborate with foundries for issue resolution.

The ideal candidate has a strong electrical engineering background with experience in DRC/LVS, HSPICE, and VLSI design. The position offers a competitive salary ranging from $168,000 to $310,500, equity, and benefits.

Applications will be accepted until May 24, 2026.

Qualifications

• 10 years of experience with B.S. or 7 years with M.S. in Electrical Engineering.
• Understanding of PDK structure and development processes.
• Background in mosfet device behavior, CMOS layout, and VLSI design.

Responsibilities

• Align the PDK development schedule with foundries.
• Download the PDK and perform incoming checks.
• Manage PDK versions between foundry and NVIDIA design teams.

Skills

DRC/LVS

HSPICE

RC extraction

EM analysis

Interpersonal skills

Education

B.S. in Electrical Engineering

M.S. in Electrical Engineering

Job description

NVIDIA is seeking a highly motivated and talented PDK Engineer to join the Advanced Technologies Group. In this role, you will align the PDK development plan with foundry partners based on NVIDIA’s test chip and product tapeout schedules. You will be responsible for downloading PDK, performing incoming checks, and managing versions for the CAD and design teams. In addition, you will be responsible for enabling new PDKs and resolving PDK‑related issues in collaboration with foundry partners.

The successful candidate will have a strong electrical engineering background with an in-depth understanding of circuits, layouts, and VLSI design. We are looking for someone with experience in DRC/LVS, HSPICE, RC extraction, and EM analysis. Experience in both analog and digital IP design is preferred. This role involves a combination of engineering and support responsibilities; therefore, the candidate should possess strong interpersonal and communication skills.

What you'll be doing:

• Align the PDK development schedule with foundries
• Download the PDK and perform incoming checks
• Manage PDK versions between the foundry and NVIDIA design/tapeout teams
• Serve as the primary communication channel between NVIDIA and foundry PDK teams for all PDK-related issues and new requests
• Work with CAD tool vendors to identify and resolve bugs and enable new tool features

What we need to see:

• B.S. (or equivalent experience) in Electrical Engineering with 10 years of experience or an M.S. in Electrical Engineering with 7 years of experience.
• Understanding of PDK structure and PDK development processes
• Understanding basic fab process, mask generation, testing and qualification.
• Background of mosfet device behavior, CMOS layout, and VLSI design.
• Great interpersonal skills
• Passionate about providing excellent support for end-users

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD – 264,500 USD for Level 4, and 196,000 USD – 310,500 USD for Level 5.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until May 24, 2026.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.