Senior Mobile Computer Vision & AI Engine Architect

QUALCOMM, Inc.

San Diego (CA)

On-site

USD 130,000 - 194,000

Full time

14 days+
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Job summary

Qualcomm Technologies, Inc. is seeking candidates for its Mobile Computer Vision and AI Systems Architecture Team in San Diego, CA to advance next-generation computer vision and DL solutions on heterogeneous mobile platforms.

The role focuses on hardware-aware algorithm design, DL engine architecture, and HW/SW co-design for real-time, power-efficient implementations across CPUs, GPUs, DSPs, NPUs, and dedicated accelerators.

Qualifications

  • Bachelor's degree in Computer or Electrical Engineering, Computer Science, or related field required.
  • 2+ years of software/hardware/systems engineering experience preferred.
  • PhD or Master's degree holders welcomed depending on experience.

Responsibilities

  • Study state-of-the-art computer vision and DL models and map onto mobile AI accelerators and heterogeneous compute platforms.
  • Drive architecture development for hardware-aware DL engines and accelerators.
  • Analyze workloads to improve throughput, power, memory bandwidth, and silicon area.
  • Define HW/SW partitioning across CPUs, GPUs, DSPs, NPUs and accelerators.
  • Collaborate with hardware teams to define next-gen AI engine features and capabilities.
  • Lead architecture exploration from algorithm requirements to hardware implementation.

Skills

C/C++
Python
Performance analysis
System architecture

Education

Bachelor's degree in Computer or Electrical Engineering, Computer Science, or related field
Master's degree in Computer or Electrical Engineering, Computer Science, or related field
PhD in Computer or Electrical Engineering, Computer Science, or related field

Tools

Tensor processing
AI accelerators
HW/SW co-design

Job description

Qualcomm Technologies, Inc. is seeking candidates for its Mobile Computer Vision and AI Systems Architecture Team in San Diego, CA to advance next-generation computer vision and DL solutions on heterogeneous mobile platforms.

The role focuses on hardware-aware algorithm design, DL engine architecture, and HW/SW co-design for real-time, power-efficient implementations across CPUs, GPUs, DSPs, NPUs, and dedicated accelerators.

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