Senior Mixed-Signal Post-Silicon Validation Engineer

K2 Space; Seattle (WA); On-site; USD 170,000 - 250,000; Full time

Benefits offered by this job

Equity

Paid time off

Medical/dental/vision coverage

Life insurance

Paid parental leave

Job summary

K2 Space in Seattle, WA is seeking a hands-on Senior Mixed-Signal Post-Silicon Validation Engineer to bring up and characterize complex mixed-signal SoCs from first silicon through product integration.

You will work with analog/mixed-signal, DSP, firmware, FPGA, digital and hardware teams to validate silicon performance, debug issues, and build the validation capability from the ground up. The role emphasizes lab automation and cross-team collaboration.

Qualifications

• BS or MS in Electrical Engineering or related field.
• 5+ years in mixed-signal silicon validation or related roles.
• Strong hands-on with high-speed test equipment and automated test environments.

Responsibilities

• Bring up and characterize mixed-signal silicon across ADCs, DACs, PLLs and references.
• Develop characterization plans across frequency, voltage, temp, process and modes.
• Measure SNDR, SFDR, ENOB, INL/DNL, noise and jitter.
• Develop automated test setups for data collection and reporting.
• Correlate measurements with simulations and identify performance gaps.
• Validate DSP/calibration algorithms on silicon with system models.
• Debug issues spanning silicon, firmware, packaging, PCB, and test rigs.
• Support transition from chip validation to product integration and system testing.
• Contribute to lab/building validation infrastructure and measurement methods.
• Document results, limitations, workarounds, and lessons learned.

Skills

Mixed-signal

Lab instrumentation

Python scripting

Debugging

System-level validation

Education

MS in Electrical Engineering

Tools

Oscilloscopes

Spectrum analyzers

Vector signal generators

Phase-noise analyzers

Network analyzers

Power supplies

Job description

Senior Mixed-Signal Post-Silicon Validation Engineer

Seattle, WA

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we’re mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.

The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today’s and tomorrow’s massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.

With multiple launches in 2027 and plans to scale to 100 satellites a year, we’re Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you’re excited about contributing to the success of a high-growth Series D-funded company, we’d love for you to apply.

About the Role

We are looking for a hands‑on Senior Mixed‑Signal Post‑Silicon Validation Engineer to bring up and characterize complex mixed‑signal SoCs from first silicon through product integration.
You will work closely with analog/mixed‑signal designers, systems/DSP, firmware, FPGA, digital, and hardware teams to validate silicon performance, debug issues, and build our test and validation capability from the ground up.

Responsibilities

• Bring up and characterize mixed‑signal silicon, including ADCs, DACs, PLLs, clocking, references, power, and analog signal paths.
• Develop and execute characterization plans across frequency, voltage, temperature, process, and operating modes.
• Measure key converter and analog performance including SNDR, SFDR, ENOB, INL/DNL, noise, bandwidth, jitter, phase noise, linearity, and power.
• Develop automated test setups for characterization, regression, data collection, analysis, and reporting.
• Work closely with analog/mixed‑signal designers to correlate silicon measurements with simulations and identify performance gaps.
• Partner with systems/DSP teams to validate DSP and calibration algorithms on silicon and correlate results with system models.
• Debug complex issues spanning silicon, firmware, package, PCB, test setup, and system behavior.
• Support the transition from chip‑level validation to product integration and system‑level testing.
• Contribute to building the validation lab, test infrastructure, measurement methodology, and automation from the ground up.
• Document characterization results, silicon limitations, workarounds, and lessons learned for future silicon generations.

Qualifications

• BS/MS in Electrical Engineering or related field.
• 5+ years of mixed‑signal silicon validation, characterization, product engineering, or related experience.
• Strong understanding of ADC, DAC, PLL, clocking, and analog circuit fundamentals.
• Deep hands‑on experience with lab test equipment such as high‑speed oscilloscopes, spectrum/signal analyzers, vector signal generators, phase‑noise analyzers, network analyzers, power supplies, and related mixed‑signal instrumentation.
• Experience developing automated characterization environments using Python or similar scripting languages and instrument‑control interfaces.
• Strong understanding of signal integrity, noise, clock jitter, spectral analysis, and mixed‑signal measurement techniques.
• Strong debugging skills and ability to isolate issues across chip, package, PCB, firmware, and test environments.
• Experience working closely with IC designers and systems engineers to correlate measurements with simulations and models.
• Ability to operate effectively in a fast‑moving environment and build test capability from the ground up.

Preferred Qualifications

• RF/mmWave mixed‑signal SoC experience.
• Experience with high‑speed or RF‑sampling ADCs and DACs.
• Experience validating digitally assisted analog circuits and calibration algorithms.
• Familiarity with JESD204 or other high‑speed converter interfaces.
• Experience with automated PVT characterization and large‑scale measurement data analysis.
• Familiarity with FPGA‑based test platforms and embedded firmware.
• SI/PI, package, high‑speed PCB, and RF measurement experience.

Compensation and Benefits

• Base salary range for this role is $170,000 – $250,000 + equity in the company
• Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
• Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks

If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non‑traditional career twists and turns are encouraged!

If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know.

Export Compliance

As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.”

The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license.

K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.