Senior Manager, ATE Test Engineering — High-Speed SoC Validation

Astera Labs; Santa Clara (CA); On-site; USD 195,000 - 250,000; Full time

Job summary

Astera Labs is seeking a Manager, ATE Test Engineering to lead our Test engineering organization in San Jose, CA. This leadership role drives next-generation high-speed, high-performance products from silicon bring-up through high-volume manufacturing.

You will build and scale the Test Engineering team responsible for developing scalable ATE solutions for mixed-signal silicon and high-speed products powering AI infrastructure.

Qualifications

• Bachelor's degree in electrical engineering or related field.
• 8+ years of experience developing and supporting ATE test solutions for complex high-speed products or SoC products.
• 3+ years of managerial experience building and leading Test engineering team.
• Working knowledge of high-speed protocols and physical-layer behavior, including PCIe, Ethernet, DDR, NVMe, or USB.

Responsibilities

• Define end-to-end ATE test strategies and plans for high-speed connectivity products from design engagement through high-volume production.
• Establish coverage, quality, test-time, cost, and yield objectives, and drive measurable improvements across the product lifecycle.
• Lead silicon and ATE bring-up, bench-to-ATE correlation, production release, and ongoing test optimization.
• Guide tester platform selection and development of load boards, interface hardware, and test solutions for wafer sort and final test.

Skills

ATE test engineering

Leadership

Test strategy

Silicon bring-up

High-speed protocols

Python/C++

DFT/MBIST

Education

Bachelor's degree in Electrical Engineering

Master’s or PhD (preferred)

Tools

Advantest 93k

Teradyne platforms

Load boards

MBIST tools

Job description

Astera Labs is seeking a Manager, ATE Test Engineering to lead our Test engineering organization in San Jose, CA. This leadership role drives next-generation high-speed, high-performance products from silicon bring-up through high-volume manufacturing.

You will build and scale the Test Engineering team responsible for developing scalable ATE solutions for mixed-signal silicon and high-speed products powering AI infrastructure.