Senior / Lead Data Converter IC Design Engineer (FinFET)

Encore Semi Llc; Rochester (MN); Remote; USD 150,000 - 180,000; Full time

Benefits offered by this job

PTO - 15 days/year

Holidays - 10 days/year

Medical benefits - 80% premiums

Dental & Vision - 50% premiums

Life Insurance

401k - Traditional & Roth

Tuition reimbursement

Employee Assistance Program (EAP)

Long-Term Disability

Job summary

Encore Semi, Inc. in California seeks an experienced Analog/Mixed-Signal IC Design Engineer to architect and tape out high-speed data converters (ADCs/DACs) for 7nm–3nm FinFET processes. You will own the full design cycle—from system architecture to post-silicon validation—for HPC, AI, and communications hardware.

The role demands hands-on development of time-interleaved SAR, pipeline, and RF-DAC architectures, plus layout supervision and calibration techniques to ensure peak performance.

Qualifications

• MS or PhD in Electrical Engineering or related field.
• 10+ years of hands-on high-speed data converter design and silicon tape-outs.
• FinFET expertise in 3nm/5nm/7nm nodes.
• Familiar with FinFET design constraints (fin quantization, gm/gds, 3D RC extraction).
• Cadence Virtuoso, Spectre/PrimeSim, Calibre PEX/Quantus experience.

Responsibilities

• Architect and design multi-GS/s ADC/DAC architectures (Time-Interleaved SAR, Pipeline, Flash, or RF-DACs).
• Deliver transistor-level circuits (track-and-hold, comparators, low-jitter clock paths, bias networks) in 7nm–3nm FinFET processes.
• Implement background/foreground digital calibration for offset, gain, timing skew, and linearity.
• Supervise layout to mitigate layout-dependent effects (LDE), parasitics, electromigration, and self-heating.
• Lead post-silicon lab bring-up, bench testing, and model-to-hardware correlation.

Skills

High-speed IC design

FinFET design

Tape-out experience

Education

MS/PhD in Electrical Engineering

Tools

Cadence Virtuoso

Spectre/PrimeSim

Calibre PEX/Quantus

Job description

Senior / Lead Data Converter IC Design Engineer (FinFET)

Location: San Jose CA / San Diego CA / Remote in USA

Job Type: Full-Time & Contract Options Available

Requirements: US Citizenship / GC holder Required

Compensation: $150,000 – $180,000 / year + Comprehensive Benefits

About the Role

We are seeking an experienced Analog/Mixed-Signal IC Design Engineer to architect and tape out high-speed data converters (ADCs/DACs) in advanced FinFET nodes (7nm down to 3nm). You will own the full design cycle—from system architecture to post-silicon validation—for next-gen HPC, AI, and communications hardware.

Key Responsibilities

• Architect and design multi-GS/s ADC/DAC architectures (Time-Interleaved SAR, Pipeline, Flash, or RF-DACs).
• Deliver transistor-level circuits (track-and-hold, comparators, low-jitter clock paths, bias networks) in 7nm–3nm FinFET processes.
• Implement background/foreground digital calibration for offset, gain, timing skew, and linearity.
• Supervise layout to mitigate layout-dependent effects (LDE), parasitics, electromigration, and self-heating.
• Lead post-silicon lab bring-up, bench testing, and model-to-hardware correlation.

Qualifications

• Education: M.S. or Ph.D. in Electrical Engineering or related field.
• Experience: 10+ years of hands-on high-speed data converter design and successful silicon tape-outs.
• FinFET Expertise: Proven track record in advanced nodes (3nm, 5nm, or 7nm).
• Core Knowledge: Strong command of FinFET-specific design constraints (fin quantization, degraded g m / g ds, 3D RC extraction).
• EDA Tools: Cadence Virtuoso, Spectre/PrimeSim, and Calibre PEX/Quantus.

Full-Time Benefits:

• 15 days of PTO per calendar year
• 10 paid Holidays per calendar year
• Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents
• Dental & Vision: Company covers 50% of premiums for Employee and Dependents
• Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance
• Employee Assistant Program (EAP)
• 401k - Traditional & Roth
• Life/AD&D and Long-Term Disability
• Tuition reimbursement

Equal Opportunity Policy Statement

Encore Semi, Inc. is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race, religion, creed, color, age, sex, sexual orientation, gender, gender identity or expression, national origin, genetics, ancestry, marital status, civil union status, medical condition, disability (mental and physical), military and veteran status, pregnancy, childbirth and related medical conditions, or any other characteristic protected by applicable federal, state, or local laws and ordinances.

Encore Semi is also committed to compliance with all fair employment practices regarding citizenship and immigration status.

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