Senior Hardware Diagnostics Engineer for AI Silicon

MatX; Mountain View (CA); On-site; USD 120,000 - 600,000; Full time

Benefits offered by this job

Equity options

Health insurance

Remote work

Parental leave

Professional development

Team meals

401K match

Job summary

MatX is building a diagnostics-first hardware system for AI workloads in Mountain View. We seek a Diagnostic Engineer to own the full diagnostics test suite for accelerator boards and racks, develop tools for AI chip testing, PCIe, memory, power, and thermal management, and enable partners with robust documentation and debug support.

You will define coverage criteria, triage test escapes, and contribute to CI/CD pipelines while collaborating with manufacturing teams to ensure high yields and

Qualifications

• 7+ years in systems diagnostics, hardware validation, or manufacturing test.
• Expert in Python and C/C++ for test automation and low-level device programming.
• Deep knowledge of PCIe, memory hierarchies, power management, and I/O.

Responsibilities

• Own the end-to-end diagnostics test suite for accelerator boards and racks.
• Develop diagnostic tools covering the AI chip, PCIe, HBM, power, and thermal.
• Define test coverage and pass/fail criteria for manufacturing screening.
• Enable JDM/ODM partners with documentation, tooling, and hands-on debug support.
• Triage and root-cause manufacturing test escapes and field failures.
• Build and maintain CI/CD infrastructure for the diagnostics software stack.
• Track quality metrics — yield, test coverage, defect density — and report out.

Skills

Diagnostics engineering

Python

C/C++

Test automation

PCIe familiarity

Hardware validation

Manufacturing test

Linux tooling

Education

Electrical Engineering degree

Tools

CI/CD

Git

Linux

Job description

MatX is building a diagnostics-first hardware system for AI workloads in Mountain View. We seek a Diagnostic Engineer to own the full diagnostics test suite for accelerator boards and racks, develop tools for AI chip testing, PCIe, memory, power, and thermal management, and enable partners with robust documentation and debug support.

You will define coverage criteria, triage test escapes, and contribute to CI/CD pipelines while collaborating with manufacturing teams to ensure high yields and