Senior FPGA Engineer

Vanteon Corporation; Town of Pittsford (NY); Hybrid; USD 105,000 - 145,000; Full time

Benefits offered by this job

BCBS medical, dental, and vision (80%+

401(k) with company match

Life insurance

Employee Assistance Program

On-site gym

Paid time off

Job summary

Vanteon Corporation, a PDW company, seeks a Senior FPGA Engineer to develop FPGA and SoC solutions for customer programs and internal R&D. You will own designs, drive architecture decisions, and collaborate across hardware, software, RF, and embedded teams in a fast-paced environment.

Role combines hands-on development with problem solving and mentoring junior engineers. Preference for Rochester, NY onsite work with hybrid flexibility and regular project-based remote work as allowed.

Qualifications

• Bachelor's degree in a related technical discipline is required.
• Five or more years of FPGA development experience including simulation, implementation, and hardware verification.
• Proficiency in VHDL and/or Verilog with synthesizable design practices.
• Experience with AMD/Xilinx Vivado or comparable FPGA tools.
• Working knowledge of timing constraints, timing closure, clock-domain crossings, and resource optimization.
• Experience developing FPGA interfaces to processors, memory, peripherals, or other hardware.
• Experience with FPGA configuration, board bring-up, and debugging using lab equipment.
• Ability to work independently while collaborating across engineering disciplines.
• Strong analytical, written, and verbal communication skills.
• Ability to meet onsite ramp-up and controlled-data access requirements.

Responsibilities

• Design, implement, and verify FPGA logic for embedded systems, including control functions, data interfaces, and real-time processing.
• Translate system requirements into detailed designs, interface definitions, and verification plans.
• Develop synthesizable VHDL and/or Verilog and reusable FPGA components.
• Perform synthesis and implementation, develop timing constraints, and resolve timing and resource utilization issues.
• Create simulation environments and test benches to verify functionality before hardware integration.
• Perform FPGA configuration, hardware bring-up, debugging, and integration with embedded processors, firmware, and electronic subsystems.
• Collaborate with RF, hardware, DSP, and embedded software engineers to resolve integration challenges.
• Participate in architecture discussions and design reviews, explaining technical approaches and tradeoffs.
• Maintain technical documentation, including design descriptions, interface specifications, and verification results.
• Provide estimates and communicate progress, technical risks, and issues affecting assigned work.
• Support junior engineers and co-op students through design guidance, reviews, and troubleshooting.

Skills

VHDL/Verilog

FPGA/SoC design

Vivado

Timing closure

FPGA interfaces

Embedded FPGA verification

Synthesis/implementation

Debugging with lab tools

Education

Bachelor's degree in Electrical/Computer Engineering or related field

Master's degree preferred

Tools

Vivado

Questa/ModelSim

Intel Quartus

Job description

Vanteon, a Performance Drone Works (PDW) Company, develops wireless, RF, and embedded technology for demanding applications. Our engineers work across hardware, software, firmware, and FPGA design to bring complex systems from concept through implementation and verification.

We are seeking a Senior FPGA Engineer to develop FPGA and SoC solutions for customer programs and internal research and development. You will take ownership of assigned designs, contribute to architecture decisions, and work closely with engineers across disciplines to deliver reliable embedded systems. This role combines hands-on development, problem-solving, and opportunities to mentor junior team members.

What You'll Do

• Design, implement, and verify FPGA logic for embedded systems, including control functions, data interfaces, and real-time processing.
• Translate system requirements into detailed designs, interface definitions, and verification plans.
• Develop synthesizable VHDL and/or Verilog and reusable FPGA components.
• Perform synthesis and implementation, develop timing constraints, and resolve timing and resource utilization issues.
• Create simulation environments and test benches to verify functionality before hardware integration.
• Perform FPGA configuration, hardware bring-up, debugging, and integration with embedded processors, firmware, and electronic subsystems.
• Collaborate with RF, hardware, DSP, and embedded software engineers to resolve integration challenges.
• Participate in architecture discussions and design reviews, explaining technical approaches and tradeoffs.
• Maintain technical documentation, including design descriptions, interface specifications, and verification results.
• Provide estimates and communicate progress, technical risks, and issues affecting assigned work.
• Support junior engineers and co-op students through design guidance, reviews, and troubleshooting.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
• Five or more years of professional FPGA development experience, including delivery of designs through simulation, implementation, and hardware verification.
• Proficiency in VHDL and/or Verilog and a strong understanding of synthesizable design practices.
• Experience with AMD/Xilinx Vivado or comparable FPGA development tools.
• Working knowledge of timing constraints, timing closure, clock-domain crossings, reset strategies, and resource optimization.
• Experience developing FPGA interfaces to processors, memory, peripherals, or other hardware.
• Experience with FPGA configuration, board bring-up, and debugging using simulation tools, embedded logic analyzers, and laboratory equipment.
• Ability to independently complete assigned development work while collaborating effectively across engineering disciplines.
• Strong analytical, written communication, and verbal communication skills.
• Ability to meet the onsite ramp-up and controlled-data access requirements described below.

Preferred

• Master's degree in a relevant engineering discipline.
• Experience with AMD/Xilinx Zynq, UltraScale+, or comparable FPGA and SoC platforms.
• Experience with Vivado/Vitis, Questa/ModelSim, or Intel Quartus toolchains.
• Experience implementing DSP algorithms, digital communications functions, or software-defined radio capabilities in FPGA hardware.
• Experience with interfaces such as AXI, SPI, I²C, UART, DMA. Ethernet, PCIe, and DDR memory.
• Familiarity with embedded C/C++, processor-to-FPGA integration, and embedded Linux systems.
• Experience using Python or Tcl to automate development, verification, or testing.
• Familiarity with version control and continuous integration.
• Experience supporting wireless, RF, aerospace, defense, robotics, or other demanding embedded applications.

Physical Requirements

This position involves extended periods working at a computer and performing laboratory development and testing. Duties may require sitting, standing, walking, reaching, and handling electronic hardware and test equipment. Must be able to lift up to 15 pounds at times. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions.

This role works closely with engineers in an office and electronics laboratory environment.

Our preference is for a candidate who can work regularly from our Rochester, NY office, with flexibility to work from home as project activities allow. Hardware bring-up, integration, testing, and other collaborative work will require onsite participation.

Exceptionally qualified candidates outside the region may be considered only if they can work onsite in Rochester for an initial ramp-up period of three to six months before transitioning to a remote arrangement. Any subsequent remote arrangement will depend on project needs and the ability to perform assigned responsibilities effectively.

Occasional work outside normal business hours may be necessary to support project milestones and integration activities.

ITAR and CUI Requirement

This position requires access to export-controlled technical data and Controlled Unclassified Information (CUI). Candidates must be U.S. citizens or otherwise eligible to access the specific ITAR-controlled data and CUI required for assigned projects without additional authorization.

Vanteon offers a flexible work environment and diverse projects spanning defense, commercial, and green technologies for companies large and small. Employees can expand their skills through cross-training, education benefits, and a mentoring program that connects them with senior staff and provides opportunities to mentor junior engineers and co-op students. Employee-sponsored events create opportunities to connect beyond project work.

Vanteon values our team, and we offer a compensation package reflective of your experience and capabilities. Benefits include:

• Comprehensive BCBS medical, dental, and vision coverage; Starting in 2027, 80% sponsored by the company.
• Safe Harbor 401(k) with company match.
• Employer-provided life insurance.
• Robust Employee Assistance Program (EAP).
• On-site gym.
• Competitive salary, generous paid time off (PTO), and flexible leave options.

EEO Statement

Vanteon is an equal opportunity employer. Qualified applicants will receive consideration without regard to race, color, religion, age, sex, sexual orientation, gender identity or expression, national origin, disability, genetic information, protected veteran status, or any other characteristic protected by applicable law.

Compensation

This position will have an annual salary, equity, and benefits. The salary range provided is a guideline rather than a fixed limit. Individual pay is determined by factors including geography, job-related skills, experience, and relevant education or training.

The pay range for this role is: 105,000–145,000 USD per year (ROC)

Due to contractual requirements, if hired you will be required to pass both a background and drug screening.