Senior FPGA Engineer

KBR, Inc.

Beavercreek Township (OH)

On-site

USD 160,000 - 210,000

Full time

14 days+

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Job summary

KBR, Inc. in Beavercreek, OH is seeking a Senior FPGA Engineer to lead FPGA-based DSP, SDR, and RF system design. You will drive hardware/firmware integration, optimize performance, and mentor engineers across hardware, software, and firmware teams.

Join a mission-focused environment delivering advanced defense and space hardware. You will work hands-on with DSP algorithms, AXI interfaces, and lab bring-up, contributing to end-to-end system integration and robust verification.

Qualifications

  • Bachelor’s degree in Electrical or Computer Engineering.
  • 8+ years experience in FPGA, DSP, communications, or RF signal processing.
  • Proficiency in VHDL and/or Verilog.
  • Experience with FPGA devices from AMD or other major vendors.
  • Experience with Vivado or similar toolchains.
  • Familiarity with AXI-based communication architectures.
  • Strong DSP fundamentals: sampling, filtering, FFTs.
  • Linux development experience.
  • Git or similar version control experience.
  • Ability to obtain/maintain a U.S. DoD security clearance.

Responsibilities

  • Design, implement, and maintain FPGA-based DSP architectures for advanced communications and RF systems.
  • Lead FPGA logic development across SDR platforms, ensuring reliability and interoperability.
  • Implement and optimize real-time DSP algorithms in hardware (filters, FFTs, modulation).
  • Integrate FPGA designs with embedded processors and peripherals via AXI.
  • Develop software/firmware to control FPGA modules.
  • Perform hardware bring-up and lab testing with RF/digital equipment.
  • Create simulations, testbenches, and verification workflows.

Skills

FPGA Design
DSP
VHDL/Verilog
AXI-based
Linux
Git
DoD clearance
Vivado
C/C++

Education

Bachelor’s degree in Electrical or Computer Engineering
Master’s or PhD in Electrical/Computer Engineering

Tools

Vivado
PetaLinux
Yocto
MATLAB/Simulink

Job description

Title:

Senior FPGA Engineer

Belong. Connect. Grow. with KBR!

KBR’s National Security Solutions team provides high-end engineering and advanced technology solutions to our customers in the intelligence and national security communities. In this position, your work will have a profound impact on the country’s most critical role – protecting our national security.

Why Join Us?
  • Innovative Projects: KBR’s work is at the forefront of engineering, logistics, operations, science, program management, mission IT and cybersecurity solutions.

  • Collaborative Environment: Be part of a dynamic team that thrives on collaboration and innovation, fostering a supportive and intellectually stimulating workplace.

  • Impactful Work: Your contributions will be pivotal in designing and optimizing defense systems that ensure national security and shape the future of space defense.

KBR is seeking a Senior FPGA / Digital Signal Processing Engineer to lead the design, development, integration, and debugging of advanced FPGA‑based communications, RF, and signal processing systems. This role involves hands‑on FPGA development, DSP algorithm implementation, embedded processor integration, and laboratory hardware bring‑up in a collaborative, mission‑focused environment.

The ideal candidate brings deep experience with FPGA‑based DSP systems, strong analytical skills, and the ability to work independently across hardware, firmware, and software domains while providing technical leadership to the team.

Key Responsibilities
  • Design, implement, and maintain FPGA‑based DSP architectures for advanced communications and RF systems.

  • Lead the development and integration of FPGA logic across multiple Software‑Defined Radio (SDR) platforms, ensuring reliable performance and interoperability.

  • Implement, optimize, and debug real‑time DSP algorithms in hardware, including filtering, FFTs, modulation/demodulation, and synchronization functions.

  • Integrate FPGA designs with embedded processors, external peripherals, and system interfaces using standard communication protocols such as AXI.

  • Develop supporting software and firmware to command, control, and interface with FPGA‑based modules.

  • Perform hardware bring‑up, test, and debugging in laboratory environments using standard RF and digital test equipment.

  • Create and maintain simulation environments, testbenches, and verification workflows to validate functional and timing correctness of FPGA designs.

  • Collaborate with RF, software, firmware, and systems engineers to support end‑to‑end system integration and troubleshooting.

  • Analyze and optimize FPGA performance with respect to throughput, latency, resource utilization, and power constraints.

  • Develop scripts and automation tools to support FPGA build, test, and deployment workflows.

  • Support configuration management, documentation, and version control best practices throughout the FPGA development lifecycle.

  • Lead or participate in technical design reviews, provide engineering estimates, and contribute to system architecture decisions.

  • Mentor junior and mid‑level engineers and promote best practices in FPGA design, DSP implementation, and debugging techniques.

Minimum Qualifications
  • Bachelor’s degree in Electrical or Computer Engineering
  • 8+ years of relevant experience in FPGA, DSP, communications, or RF signal processing systems
  • Proficiency in VHDL and/or Verilog
  • Experience targeting FPGA devices from AMD and/or other major vendors
  • Experience with FPGA development tools such as Vivado or similar toolchains
  • Familiarity with AXI‑based communication architectures
  • Strong understanding of DSP fundamentals, including sampling, filtering, and Fourier transforms
  • Experience working in a Linux development environment
  • Experience using Git or similar version control systems
  • Ability to obtain and maintain a U.S. DoD security clearance
Preferred Qualifications
  • Master’s or PhD in Electrical Engineering, Computer Engineering, or a related field
  • Experience implementing DSP algorithms in both HDL and C/C++
  • Experience with SDR frameworks such as GNU Radio, RFNoC, RedHawk SDR, or OpenCPI
  • Experience integrating FPGA logic with embedded processors (e.g., ARM, MicroBlaze)
  • Familiarity with MATLAB/Simulink or similar modeling tools
  • Experience with advanced verification, simulation, or debug tools
  • Experience developing automation or prototyping tools using Python
  • Experience with AMD Zynq‑7000 or Zynq UltraScale+ RFSoC platforms
  • Experience with PetaLinux and/or Yocto build systems
Basic Compensation:$160,000 - $210,000 (For Beavercreek, OH Only)

The offered rate will be based on the selected candidate’s knowledge, skills, abilities and/or experience and in consideration of internal parity.

Belong, Connect and Grow at KBR

At KBR, we are passionate about our people and our Zero Harm culture. These inform all that we do and are at the heart of our commitment to, and ongoing journey toward being a People First company. That commitment is central to our team of team’s philosophy and foster an environment where everyone can Belong, Connect and Grow. We Deliver – Together.

KBR is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, disability, sex, sexual orientation, gender identity or expression, age, national origin, veteran status, genetic information, union status and/or beliefs, or any other characteristic protected by federal, state, or local law.

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