Senior FPGA Digital Design & Development Engineer (Hybrid)

Cisco Systems, Inc.; Milpitas (CA); Hybrid; USD 155,000 - 225,000; Full time

Benefits offered by this job

Hybrid work model

Job summary

Cisco Systems, Inc. in Milpitas, CA is seeking a Senior FPGA Engineer to join the IoT team within the Networking Hardware Engineering group.

You will translate requirements into FPGA architectures and own design from RTL to release. You will collaborate across hardware, embedded software, and verification teams, contributing to verification, bring-up, and production releases, while helping refine workflows and reusable designs.

Qualifications

• 7+ years FPGA development with a Bachelor’s or 4+ years with a Master’s degree.
• Experience delivering FPGA functionality across the product lifecycle.
• Verilog or SystemVerilog for synthesizable RTL and related design fundamentals.
• Experience with FPGA toolchains for simulation, synthesis, place&route, timing.
• Hardware bring-up and debugging across FPGA, embedded software, and board hardware.

Responsibilities

• Translate system and product requirements into FPGA architectures, detailed designs, and hardware/software interfaces.
• Develop and maintain RTL for packet processing, network redundancy, precision timing, and platform control functions.
• Define verification plans and develop simulations that validate functionality, corner cases, and recovery behavior.
• Perform synthesis, implementation, timing analysis, and timing closure while balancing performance and resource utilization.
• Collaborate with hardware and software engineers on interface definitions, initialization sequences, diagnostics, and system integration.
• Support hardware bring-up and troubleshoot issues using simulation waveforms, packet captures, register traces, and laboratory tools.
• Investigate root causes, implement corrective changes, and validate fixes across affected platforms.
• Deliver reproducible FPGA builds, validated release images, and clear design and release documentation.
• Participate in technical reviews, mentor teammates, and improve reusable designs, verification coverage, and development workflows.

Skills

FPGA development

RTL design

Verilog/SystemVerilog

Digital design fundamentals

Clock domain crossing

Education

Bachelor’s degree in Electrical or Computer Engineering

Tools

FPGA toolchains

Hardware bring-up tooling

Job description

The application window is expected to close on: 02/25/2027

This position follows a hybrid work model and requires that you live within commuting distance of our Milpitas, CA office and commute to the office 2-3 days per week.

Meet the Team

The Networking Hardware Engineering (NHE) group creates innovative hardware platforms central to the AI era, powering Cisco's core Switching, Routing, and Wireless products for organizations globally. NHE serves as the execution engine for Cisco's most strategic hardware initiatives. We partner across silicon, engineering, product management, operations, supply chain, manufacturing, and executive leadership to transform technology strategy into successful product delivery. Our mission is to provide program leadership, governance, transparency, and execution difficulty across highly complex system development programs, shaping the future of hyperscale infrastructure.

Cisco's IoT team develops industrial networking products that connect and protect the infrastructure behind manufacturing, utilities, transportation, and other essential industries. Our portfolio brings together rugged switching, routing, and wireless connectivity to help customers bridge IT and operational technology, automate operations, and build resilient networks for demanding environments.

Within the IoT business unit, our FPGA team develops specialized capabilities that help these products meet industrial requirements for reliability, availability, and precise timing. Our work spans Ethernet packet processing, network redundancy protocols, and precision time processing and synchronization. We also provide essential platform functionality, including hardware interfaces, clock and reset control, power sequencing, and diagnostics across multiple product families.

You’ll join engineers who work closely with hardware, embedded software, and system validation teams to take designs from architecture and RTL through verification, hardware bring-up, and production release. The work combines new feature development with hands‑on investigation of complex system behavior, offering meaningful technical ownership and the opportunity to see your designs contribute directly to reliable industrial operations.

Your Impact

As a Senior FPGA Engineer in Cisco's IoT team, you’ll develop capabilities that help industrial networks operate reliably, maintain precise timing, and recover from disruptions. Your engineering judgment will shape product architecture, improve design quality, and help solve complex challenges across our industrial networking platforms.

You’ll collaborate with hardware, embedded software, and verification teams throughout the product development cycle-from defining requirements and evaluating design approaches to validating hardware and supporting production releases. You’ll take ownership of FPGA features and subsystems while contributing to design reviews, sharing knowledge, and improving how the team develops and delivers products. Your responsibilities will include:

• Translate system and product requirements into FPGA architectures, detailed designs, and hardware/software interfaces.
• Develop and maintain RTL for packet processing, network redundancy, precision timing, and platform control functions.
• Define verification plans and develop simulations that validate functionality, corner cases, and recovery behavior.
• Perform synthesis, implementation, timing analysis, and timing closure while balancing performance and resource utilization.
• Collaborate with hardware and software engineers on interface definitions, initialization sequences, diagnostics, and system integration.
• Support hardware bring-up and troubleshoot issues using simulation waveforms, packet captures, register traces, and laboratory tools.
• Investigate root causes, implement corrective changes, and validate fixes across affected platforms.
• Deliver reproducible FPGA builds, validated release images, and clear design and release documentation.
• Participate in technical reviews, mentor teammates, and improve reusable designs, verification coverage, and development workflows.

Minimum Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related discipline with 7+ years of relevant FPGA development experience, or a master’s degree in a related discipline with 4+ years of relevant FPGA development experience, or an equivalent combination of education and practical experience.
• Experience delivering FPGA functionality through the product development lifecycle, including requirements definition, RTL development, simulation, implementation, hardware validation, and production release.
• Verilog or SystemVerilog experience in developing synthesizable RTL and maintaining existing designs, supported by experience with digital design fundamentals such as synchronous logic, state machines, buffering, clock domain crossings, and reset strategies.
• Experience with FPGA development tools, including simulation, synthesis, place and route, timing constraints, and timing closure.
• Experience with hardware bring-up and system debugging, including investigating interactions between FPGA logic, embedded software, and board hardware.

Preferred Qualifications

• Experience collaborating with hardware, software, and verification engineers to define interfaces, resolve technical issues, and deliver working products.
• Experience developing FPGA solutions for industrial networking, embedded systems, or other applications requiring high reliability and availability.
• Experience with Ethernet packet processing, network redundancy and recovery mechanisms, or precision time synchronization and timestamping.
• Experience integrating Ethernet interfaces, external physical-layer devices, and third-party intellectual property into FPGA designs.
• Experience with platform management functions, including power sequencing, clock and reset control, peripheral interfaces, and system diagnostics.
• Experience with multiple FPGA families and vendor toolchains, including evaluating resource utilization and design tradeoffs.
• Experience developing automated testbenches, regression environments, and reusable verification components.
• Experience with scripting languages such as Python, Tcl, or shell to automate builds, verification, and debug workflows in a Linux environment.
• Experience developing reusable FPGA components, supporting designs across multiple product variants, and improving development and release processes.
• Experience with technical reviews, mentoring, or architecture decisions involving hardware and software teams.

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with us.

Message to applicants applying to work in the U.S. and/or Canada:

The starting salary range posted for this position is $154,900.00 to $225,300.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

Individual pay is determined by the candidate’s hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

• 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
• 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
• Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
• Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
• 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next
• Additional paid time away may be requested to deal with critical or emergency issues for family members
• Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

• .75% of incentive target for each 1% of revenue attainment up to 50% of quota;
• 1.5% of incentive target for each 1% of attainment between 50% and 75%;
• 1% of incentive target for each 1% of attainment between 75% and 100%; and
• Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold