Senior FPGA Design Engineer — Hardware Assurance (Hybrid)

University of Southern California; Arlington (VA); Hybride; USD 140 000 - 170 000; Plein temps

Avantages offerts par ce poste

Hybrid work options

Résumé du poste

University of Southern California’s Information Sciences Institute in Arlington, VA is seeking a Senior FPGA Design Engineer to lead FPGA system design and RTL development for hardware assurance research. You will work with FPGA hardware, instruments, and software tools to measure, validate, and analyze device performance, while developing automated flows in Python/TCL.

The role requires a Master’s degree and 8+ years of FPGA experience, with tools like Vivado or Quartus, and eligibility for a

Qualifications

• Master’s degree in computer engineering, electrical engineering, computer science, or a closely related field.
• Eight or more years of overall relevant research engineering experience, including at least five years of directly relevant FPGA design experience.
• Demonstrated experience planning and executing FPGA designs and developing RTL in VHDL or Verilog.
• Proficiency with scripting languages such as Python or TCL.
• Proficiency with FPGA EDA tools such as AMD Xilinx Vivado or Intel Altera Quartus, including synthesis, implementation, and timing closure.
• Experience interfacing directly with FPGA hardware, power supplies, and other test instrumentation.
• Willingness and eligibility to apply for and maintain a Top Secret security clearance. Eligibility for this clearance requires U.S. citizenship.

Responsabilités

• Plan, lead, implement, and verify specialized FPGA systems and RTL components in VHDL or Verilog to support hardware-assurance research.
• Use FPGA EDA tools to perform synthesis, implementation, timing analysis, timing closure, and device programming.
• Interface directly with FPGA hardware, power supplies, and other test instrumentation to collect measurements, validate behavior, and analyze device functionality.
• Develop Python, TCL, and related scripts to automate design flows, testing, data collection, and analysis.
• Identify, plan, and implement extensions to commercial and open-source EDA tools, and evaluate new FPGA-assurance capabilities.
• Translate research concepts and project goals into technical plans, implemented prototypes, and independently developed system components, working under minimal supervision.
• Document designs, methods, test results, and technical progress; contribute to sponsor reports, publications, presentations, and meetings with collaborators.
• Review technical implementations, establish engineering best practices, provide technical mentorship, and guide junior researchers and engineers as needed.
• Stay current with FPGA architectures, EDA methods, hardware-assurance research, and emerging AI-assisted design approaches relevant to project goals.

Connaissances

FPGA design

Verilog

VHDL

Python

TCL

RTL development

EDA tools

Vivado

Quartus

Git

Formation

Master’s degree in computer engineering / electrical engineering / computer science

Outils

AMD Xilinx Vivado

Intel Quartus

Description du poste

University of Southern California’s Information Sciences Institute in Arlington, VA is seeking a Senior FPGA Design Engineer to lead FPGA system design and RTL development for hardware assurance research. You will work with FPGA hardware, instruments, and software tools to measure, validate, and analyze device performance, while developing automated flows in Python/TCL.

The role requires a Master’s degree and 8+ years of FPGA experience, with tools like Vivado or Quartus, and eligibility for a