Senior FPGA Design & Development Engineer

PeoplePilot

Melbourne (FL)

Hybrid

USD 120,000 - 150,000

Full time

4 days ago
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Job summary

PeoplePilot in Melbourne, Florida seeks a Senior FPGA Design & Development Engineer for a hybrid role. You will design and develop FPGA DSP algorithms, perform hardware bring-up, debugging, and system integration, and document designs for peer reviews.

The position requires 3 days onsite and 2 days work from home, with a compensation range of $120,000 to $150,000 per year, and opportunities to work with Xilinx toolchains, ModelSim/Questa, and MATLAB simulations.

Qualifications

  • Must-have: FPGA design and DSP implementation in FPGA hardware.
  • Experience with Xilinx FPGA tools and architectures.
  • MATLAB modeling and simulation experience.
  • Hardware lab testing and system integration experience.
  • Timing analysis and timing closure experience.
  • RF, SDR, radar, or communications systems experience.
  • FPGA board bring-up and hardware debugging.
  • Experience with ModelSim and Questa.
  • Requirements capture and detailed design documentation experience.

Responsibilities

  • FPGA design and development across the project lifecycle.
  • Documentation of FPGA designs and DSP algorithms implemented in hardware.
  • Hardware bring-up, debugging, lab validation, and system integration support.
  • Participation in design reviews and requirements decomposition.

Skills

DSP in FPGA
Xilinx FPGA tools
MATLAB modeling
Hardware lab tests
Timing analysis
RF/SDR/radar
FPGA bring-up
ModelSim/Questa
Requirements docs

Job description

We are seeking an Senior FPGA Design & Development Engineer for a hybrid role in Melbourne, Florida. This position requires 3 days onsite and 2 days work from home.

Compensation:

$120,000 - $150,000 per year

Must-have skills:
  • DSP / digital signal processing implementation in FPGA hardware
  • Experience with Xilinx FPGA tools and architectures
  • MATLAB modeling and simulation experience
  • Hardware lab testing and system integration experience
  • Timing analysis and timing closure experience
  • RF, SDR, radar, or communications systems experience
  • FPGA board bring-up and hardware debugging experience
  • Experience with ModelSim and Questa
  • Requirements capture and detailed design documentation experience
  • Must be a US Citizen or Green Card holder due to ITAR requirements

Responsibilities include FPGA design, development, documentation, DSP algorithm implementation in FPGA hardware, hardware bring-up, debugging, lab validation, system integration support, and participation in design reviews.

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