Senior Formal Verification Engineer

NVIDIA; Austin (TX); On-site; USD 168,000 - 264,500; Full time

Benefits offered by this job

Equity

Comprehensive benefits package

Job summary

A leading technology company in Austin, Texas is seeking a Formal Verification Engineer to verify cutting-edge chip designs. Responsibilities include developing verification methodologies and collaborating with skilled engineers to ensure design correctness. Applicants should have at least 7 years of experience in relevant fields, a strong understanding of architectures, and hands-on HDL experience. The position offers a competitive salary range of $168,000 – $264,500 for Level 4, and $196,000 – $310,500 for Level 5, along with equity and benefits.

Qualifications

• 7+ years of experience in a relevant field.
• Hands-on experience with complex RTL.
• Ability to implement effective abstraction techniques.

Responsibilities

• Identify key behaviors for verification and write test plans.
• Implement formal techniques for verification.
• Develop models to handle complexity and obtain proofs.
• Collaborate with architects, designers, and verification teams.

Skills

Solid understanding of GPU/CPU architectures

Analytical skills

Knowledge of formal verification methodologies

Experience with Verilog/SystemVerilog HDLs

Scripting using TCL, Perl, and Python

Education

BS, MS, or PhD in CS/CE/EE/Mathematics

Tools

Jasper Gold

VC Formal

Job description

NVIDIA is looking for a Formal Verification Engineer to help verify the design and implementation of industry’s leading Coherent interconnects and other high‑performance designs. As a Formal Verification Engineer, you will play a key role in ensuring the functional correctness and completeness of our next‑generation chip designs. You will collaborate with a team of highly skilled engineers to develop and implement formal verification methodologies, define the verification scope, and ensure design correctness. You will employ advanced formal techniques to obtain sufficiently bounded proofs while working with architects, designers, and pre‑ and post‑silicon verification teams to accomplish your tasks.

What Will You Be Doing

• Identify key behaviors for verification and write clear test plans for complex designs.
• Implement test plans using the latest formal techniques, including the development of environment assumptions, assertions, and cover properties.
• Develop abstraction models to overcome complexity challenges and obtain full proofs, or bounded proofs with sufficient coverage.
• Drive tools to realize their best performance.
• Debug RTL to identify causes of failure scenarios.
• Contribute to flow and script development to improve team efficiency.
• Articulate formal verification coverage of the design to partners.

What We Need To See

• BS (or equivalent experience), MS, or PhD with 7+ years of experience in CS/CE/EE/Mathematics.
• Solid understanding of GPU/CPU architectures and designs.
• Strong analytical skills to solve complex problems.
• Knowledge of formal verification methodologies and techniques.
• Able to implement abstraction techniques for effective verification.
• Hands‑on experience with Verilog/SystemVerilog HDLs, temporal logic assertions, and ability to understand complex RTL quickly.
• Excellent command of scripting using TCL, Perl, and Python.
• Preferable experience with formal verification tools (e.g., Jasper Gold, VC Formal).
• Excellent interpersonal skills, able to effectively collaborate and work with members of a distributed team.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is $168,000 – $264,500 for Level 4, and $196,000 – $310,500 for Level 5.

You will also be eligible for equity and benefits.

NVIDIA is committed to fostering a diverse work environment and is an equal‑opportunity employer. We highly value diversity in our current and future employees and do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law.