Senior Firmware Engineer

EVONA; United States; On-site; USD 120,000 - 180,000; Full time

Job summary

EVONA is seeking an experienced Firmware/FPGA Engineer to own the FPGA architecture behind next‑gen SAR and radar payloads for a US space program.

You will work across FPGA, DSP, RF and embedded systems to evolve flight‑proven firmware into a modular, reusable architecture, drive timing closure, verification and hardware bring‑up, and shape tooling as the team scales.

Qualifications

• 5+ years FPGA development experience.
• Hands-on FPGA DSP experience including FFT, filtering, DDC/DUC, waveform generation.
• Experience with Zynq/SoC architectures.
• Strong understanding of high-speed interfaces and RF/electrical schematics.

Responsibilities

• High-performance signal processing in FPGA fabric.
• Radar signal generation, beamforming and processing pipelines.
• PS–PL integration with ARM-based systems.
• High-speed interfaces and RF/ADC/DAC integration.
• Timing closure, verification and hardware bring-up.
• Help define FPGA architecture, tooling and processes as the team grows.

Skills

FPGA development

DSP in FPGA

Zynq/SoC

High-speed interfaces

Radar signal processing

RFSoC

Tools

Verilog/VHDL

Xilinx Vivado

SystemVerilog

Job description

We're working with a fast-growing, well-funded space technology company expanding its US engineering team and developing next-generation radar satellite systems.

They're looking for an experienced Firmware/FPGA Engineer to take significant ownership of the FPGA architecture behind advanced SAR and radar payloads.

The Role

You’ll work across FPGA, DSP, RF and embedded systems, helping evolve existing flight-proven firmware into a more modular, reusable architecture for future products.

You’ll be responsible for:

• High-performance signal processing in FPGA fabric
• Radar signal generation, beamforming and processing pipelines
• PS–PL integration with ARM‑based systems
• High-speed interfaces and RF/ADC/DAC integration
• Timing closure, verification and hardware bring‑up
• Helping define FPGA architecture, tooling and processes as the team grows

What We’re Looking For

• 5+ years FPGA development experience
• Hands‑on FPGA DSP experience – FFT, filtering, DDC/DUC, waveform generation, fixed‑point processing etc.
• Experience with Zynq/SoC architectures
• Strong understanding of high‑speed interfaces and electrical schematics
• Radar, SAR, EW, SDR or other high‑performance signal‑processing experience highly desirable
• RFSoC experience is a major plus
• Space/aerospace/defense experience preferred

  This is a high‑ownership role where you’ll help shape the FPGA architecture for current and future spaceborne radar products, rather than simply maintain an established design.