Senior CMP Process engineer

Samsung; Taylor (TX); In loco; USD 106.000 - 145.000; Tempo pieno

Vantaggi offerti da questo lavoro

Medical, dental, and vision insurance

Life insurance and 401(k) matching

Onsite café(s) and workout facilities

Paid maternity and paternity leave

PTO and holidays

Descrizione del lavoro

Samsung Austin Semiconductor in Austin, TX is seeking a CMP Process Engineer to lead planarization of wafer surfaces, controlling chemical reactions and mechanical forces to achieve ultra-flat wafers for subsequent steps. The role partners with process and equipment teams to optimize recipes, monitor performance, and ensure consistency across the wafer.

You will apply SPC and fault analysis, work with CMP tools from major vendors, and adapt to off-hours or shift needs.

Competenze

• Basic CMP knowledge including slurry-pad-conditioning and post-clean steps.
• Hands-on experience with CMP tools and end point systems (AMAT/EBara).
• Proficiency with SPC, FDC, and analysis software (JMP/Spotfire).
• Ability to drive root-cause analysis using FMEA, 8D, and first-principles.
• Willingness to work off-hours or with varied shift schedules as needed.

Mansioni

• Removal Rate control: evaluate factors to ensure uniform thickness across wafer.
• Condition optimization to improve uniformity and resolve issues like center low RR.
• Recipe management: develop and optimize RCP parameters for flatness.
• Defect & uniformity: manage defects and improve wafer quality.
• Consumable lifecycle: monitor pads/slurry usage to stay within specs.
• Material evaluation: assess slurries and polishing pads for CMP output.

Conoscenze

CMP knowledge

Equipment familiarity

Data & statistics

Problem solving

Flexibility

Descrizione del lavoro

About Samsung Austin Semiconductor

Samsung is a world leader in advanced semiconductor technology, founded on the belief that the pursuit of excellence creates a better world. At Samsung Austin Semiconductor, we are Innovating Today to Power the Devices of Tomorrow.

Come innovate with us!

Position Summary

A CMP (Chemical Mechanical Polishing) Process Engineer is responsible for the critical semiconductor manufacturing step of planarizing the wafer surface. This is achieved through a synergistic combination of chemical reactions and mechanical force, ensuring that subsequent layers of the chip can be built with high precision. The primary goal of a CMP engineer is to achieve a flat wafer surface by controlling the chemical reaction and mechanical force.

Role and Responsibilities

Here's What You'll Be Responsible For:

• Removal Rate (RR) Control: Conducting performance evaluations of various influence factors to ensure the thickness skew before and after CMP is consistent across the entire wafer.
• Condition Optimization: Determining the optimal process conditions to improve uniformity and resolve chronic issues, such as "center low RR profiles.
• Recipe Management: Developing and optimizing Recipe (RCP) parameters and improve flatness.
• Defect & uniformity Management: Managing and improving wafer uniformity and resolving defects such as scratches and particles.
• Consumable Life Cycle Management: Monitoring the usage cycles of consumables (pads, slurry) to ensure they do not exceed specifications, which could impact quality.
• Material Evaluation: Evaluating the performance of different slurries and polishing pads to optimize the CMP process.

Skills and Qualifications

Here's What You'll Need:

Basic requirement

• Basic CMP Knowledge: Understanding of dielectric and metal CMP fundamentals, including slurry-pad-conditioning interactions and post-clean steps.
• Prefer to have some level of Equipment Familiarities: Hands-on experience with major industry CMP tools: AMAT/EBara and their end point systems
• Data & Statistics: Proficiency in Statistical Process Control (SPC), Fault Detection and Classification (FDC), and analysis software like JMP or Spotfire.
• Problem Solving: Ability to drive root-cause analysis using methodologies like FMEA, 8D, and first-principles physics approaches.
• Flexibility: As per business needs, sometimes it is required to work during off-hour times and/or with CWW shift schedule.

Preferred Qualifications

• Familiar with Metrology Tools: Experience with Ellipsometry, SEM, and AFM for thickness and roughness check.
• Experience on Defect Reduction: Experience identifying killer defects and improving wafer yield.
• Basic Idea of Fab Integration: Understanding of how CMP affects following steps (Etch/Photo) and overall yield.
• DOE: Ability to run structured Design of Experiments for process optimization.

Salary

The current base salary range for this role is between $106,000 - $145,000. Individual base pay rates will depend on factors including duties, work location, education, skills, qualifications and experience. Total compensation for this position will include a competitive benefits package and may include participation in company incentive compensation programs, which are based on factors to include organizational and individual performance.

Export Control Note

This position may include access to controlled information or technology under U.S. export control laws. Employment may be contingent on either the applicant verifying that the applicant falls under the "U.S. Person" definition (including U.S. citizens, U.S. lawful permanent residents, and those granted U.S. asylum or refugee status) or the employer timely obtaining any necessary export license under federal law. The employer evaluates export licensing on a case-by-case basis and may decline to proceed with a job applicant in its sole discretion, as export license applications can take many weeks to process.

Total Rewards

At Samsung Austin Semiconductor, base pay is just one part of our total compensation package. The base compensation for this role will depend on education, experience, skills, and location.

We offer a comprehensive benefits package, including:

• Medical, dental, and vision insurance
• Life insurance and 401(k) matching with immediate vesting
• Onsite café(s) and workout facilities
• Paid maternity and paternity leave
• Paid time off (PTO) + 2 personal holidays and 10 regular holidays
• Wellness incentives and MORE

Eligible full-time employees (salaried or hourly) may also receive MBO bonuses based on company, division, and individual performance.

All positions at Samsung Austin Semiconductor are full-time on-site.

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