Senior ASIC Front End Infrastructure Engineer

NVIDIA; Austin (TX); On-site; USD 184,000 - 287,500; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA, located in Austin, Texas, is looking for an ASIC Infrastructure engineer. This role focuses on deploying AI toolsets to enhance productivity and delivering top-notch tooling for GPU development. Candidates should have a Master's degree and at least 8 years of relevant experience.

The position offers a competitive salary range of $184,000 to $287,500 for Level 4 and up to $356,500 for Level 5, along with equity and benefits.

Qualifications

• 8+ years of relevant work experience.
• OO design experience preferred.
• Verification domain knowledge with complex ASICs or CPUs.

Responsibilities

• Deploy AI toolsets at scale for HW Design teams.
• Improve GPU Continuous Integration system.
• Forecast HW Design compute resource needs.

Skills

Python programming

Debugging and problem-solving

Continuous Integration experience

Experience with AI tools

Make-based build systems

Interpersonal skills

Education

Masters Degree in Electrical Engineering or related field

Job description

NVIDIA is seeking elite ASIC Infrastructure engineers to deliver the tooling and environment that enables DV and RTL Design for the world's leading GPUs. This position offers the opportunity to have a real impact on a dynamic, technology‑focused company impacting product lines ranging from consumer graphics to artificial intelligence, self‑driving cars, and supercomputers.

What You'll Be Doing

• Deploy AI toolsets at scale in secure configurations for use by all HW Design teams
• Use ML/DL/AI techniques to automate Infrastructure work and improve Design team productivity
• Improve the speed, flexibility, and extensibility of the GPU front end build flow
• Keep the GPU Continuous Integration system at the cutting edge of source management methodologies
• Guide compute farm, filer, and network topology requirements at cloud scale
• Deploy and continuously improve compute farm technologies such as containers, volume cloning, distributed storage, and distributed compute at cloud scale
• Forecast HW Design compute resource and EDA needs, with reporting up to the CFO’s office
• Deploy tracking metrics to resolve operational issues, drive forecasting, and improve design productivity
• Deploy information security methods for HW design
• Remove inefficiency wherever you can find it!

What We Need To See

• Masters Degree in Electrical Engineering, Computer Engineering, Computer Science or related field, or equivalent experience
• 8+ years of relevant work experience
• Programming proficiency in Python, Perl, or another systems programming language. OO design preferred.
• Experience using AI tools for development and automation
• Experience with Make‑based build systems in large, distributed computing environments
• Continuous Integration pipeline and/or pre‑submit verification flow experience, for example using Jenkins
• Tenacity to root cause and fix Infrastructure problems, especially intermittent, hard‑to‑isolate issues in a complex computing environment
• Verification domain knowledge with complex ASICs or CPUs using techniques such as random stimulus, functional coverage, and assertion‑based verification methodologies
• Strong problem‑solving, debugging, and analytical skills
• Good interpersonal skills and a desire to work as a great teammate

Base salary will be determined based on location, experience, and the pay of employees in similar positions. The base salary range is 184,000 USD - 287,500 USD for Level 4, and 224,000 USD - 356,500 USD for Level 5.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until May 30, 2026.

NVIDIA is committed to fostering a diverse work environment and is a proud equal opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.