Senior ASIC/FPGA Verification Engineer | SystemVerilog/UVM

The Adecco Group; El Segundo (CA); On-site; USD 136,000 - 143,000; Full time

Benefits offered by this job

direct deposit

401(k)

free career counseling services

select paid holidays

short-term disability insurance

skills training

employee referral bonus

affordable medical coverage plan

DailyPay

Job summary

The Adecco Group in El Segundo, CA is seeking an experienced ASIC/FPGA Verification Engineer to develop state-of-the-art digital ICs/SoCs for enterprise programs. You will design verification environments, build reusable test benches, and drive coverage across designs used in El Segundo and other sites.

Responsibilities include creating functional coverage models, regression suites, and collaborating with design and system teams to meet project goals and timelines.

Qualifications

• Bachelor degree in Engineering or related field.
• Proven experience in ASIC/FPGA verification processes.
• Familiarity with SystemVerilog/UVM and verification framework.
• Proficiency in SystemVerilog and SystemVerilog Assertions.
• Experience in creating self-checking testbenches and coverage models.
• Knowledge of Linux environments and version control tools.

Responsibilities

• Design and implement an ASIC/FPGA verification environment using UVM & SystemVerilog.
• Develop self-checking and reusable test benches from the ground up.
• Create Functional Coverage Models and conduct Code Coverage analysis.
• Set up regression tests and collect coverage metrics over time.
• Assist in FPGA-based prototyping and validation per requirements.
• Collaborate with cross-functional teams to align verification with project goals.

Skills

ASIC/FPGA verification

SystemVerilog/UVM

Testbenches

Code Coverage

Linux

Education

Bachelor's degree in Engineering or related field

Master's degree preferred

Tools

svn

cvs

git

Job description

The Adecco Group in El Segundo, CA is seeking an experienced ASIC/FPGA Verification Engineer to develop state-of-the-art digital ICs/SoCs for enterprise programs. You will design verification environments, build reusable test benches, and drive coverage across designs used in El Segundo and other sites.

Responsibilities include creating functional coverage models, regression suites, and collaborating with design and system teams to meet project goals and timelines.