RTL Design Engineer

Y-Axis; Remote; USD 100,000 - 130,000; Full time

Job summary

A leading tech company located in San Jose, CA is seeking an RTL Design Engineer to develop and maintain next-generation technologies including microprocessors and GPUs. The ideal candidate will have a strong background in digital front-end implementation and solid problem-solving skills. Responsibilities include leading design specifications and collaborating across various departments. Candidates should hold a Master’s or Bachelor’s in Electrical Engineering and possess experience with scripting languages such as Python or Perl. A competitive benefits package is offered.

Qualifications

• 2+ years of experience in digital front-end implementation and micro‑architecture definition.
• Knowledge in synthesis, equivalence checking, CDC analysis, linting, and static timing analysis.

Responsibilities

• Develop and maintain IP for next-generation technologies powering AMD Microprocessors, GPUs, and VR sets.
• Support AMD proprietary I/O protocols and drive industry-standard Universal Chiplet Interconnect Express.
• Lead design specification, digital design, and collaboration across various areas.
• Design RTL for multi-clock, high-frequency, low-latency, low-power modules.
• Debug and bring up post‑silicon implementations.
• Document design processes and present findings to stakeholders.
• Optimize designs for area, power, and performance.

Skills

Strong analytical thinking and problem‑solving skills

Excellent attention to detail and documentation

Excellent communication skills with leadership qualities

Collaboration and interpersonal skills

Education

Master’s/Bachelor’s in Electrical Engineering or equivalent

Tools

Python

Perl

Job description

RTL Design Engineer – Advanced Micro Devices, Inc.

San Jose, California, United States – Full Time

Experience: 2 year(s) or above

Remote Job: Yes

Telecommute: Yes

Sponsor Visa: No

Overview

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. We push the limits of innovation to solve the world’s most important challenges, striving for execution excellence while being direct, humble, collaborative, and inclusive. Join us as we shape the future of AI and beyond.

Key Responsibilities

• Develop and maintain IP for next-generation technologies powering AMD Microprocessors, GPUs, and VR sets.
• Support AMD proprietary I/O protocols and drive industry-standard Universal Chiplet Interconnect Express.
• Lead design specification, digital design, and collaboration across the spectrum of areas including DFT, firmware, verification, and physical design.
• Design RTL for multi-clock, high-frequency, low-latency, low-power, high-performance modules.
• Debug and bring up post‑silicon implementations.
• Document design processes and present findings to stakeholders.
• Optimize designs for key metrics such as area, power, and performance.

Preferred Experience

• Digital front-end implementation and micro‑architecture definition.
• Experience with scripting/automation languages (Python/Perl).
• Hardware‑firmware co‑design.
• Multiple clock domain RTL design.
• Knowledge of synthesis, equivalence checking, CDC analysis, linting, and static timing analysis.

Qualifications

• Strong analytical thinking and problem‑solving skills.
• Excellent attention to detail and documentation.
• Excellent communication skills with leadership qualities.
• Collaboration and interpersonal skills.

Academic Credentials

Master’s/Bachelor’s in Electrical Engineering or equivalent (preferred).

Location

San Jose, CA

Benefits

AMD benefits at a glance. (Further details available on request.)

EEO Statement

AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.