R&D Engineer Hardware 5

Socket.dev; Irvine (CA); On-site; USD 129,000 - 207,000; Full time

Benefits offered by this job

Discretionary annual bonus

Equity grants

Comprehensive benefits

Job summary

Broadcom in Irvine, CA seeks a senior analog circuit designer specializing in high-speed wireline transceivers. You will drive design approaches, select components, and perform experiments to validate performance.

Required: 12+ years of related experience with a Bachelor's in Engineering, or 10+ years with a Master's. This role offers a competitive base salary, discretionary bonus, and equity opportunities in a broad, innovation-driven environment.

Qualifications

• Bachelors in Engineering and 12+ years of related experience; or Masters degree in Engineering and 10+ years of related experience.
• Experience with high-speed analog circuit design for wireline transceivers is preferred.
• Background in non-ASIC layout/design environments is beneficial.

Responsibilities

• Determine design approaches and parameters for high-speed analog circuits.
• Analyze equipment to establish operating data and conduct experimental tests.
• Select components based on analysis and reliability considerations.
• Review vendor capabilities to support product development.
• Collaborate across internal/external teams and maintain productive relationships.

Skills

High-Speed ADC DAC Design

PLL Design

TIA/Laser Driver Design

Equalization Techniques

CDR Circuits

Education

Bachelor's in Engineering

Master's in Engineering

Job description

Job Description:

In this line of work, the prospective employee will specialize in high-speed analog circuit design for wireline transceivers.

Determines design approaches and parameters. Analyzes equipment to establish operating data; conducts experimental tests and evaluates results. Selects components and equipment based on analysis of specifications and reliability. May also review vendor capability to support product development. Layout/design work is done in a non-ASIC product environment. Works on problems of moderate scope where analysis of situations or data requires a review of a variety of factors. Exercises judgment within defined procedures and practices to determine appropriate action. Builds productive internal/external working relationships.

The prior work or academic experience in one or more of the following design areas are highly desirable:

• High-Speed (>10Gbps) ADC and DAC Design
• High-Speed (>28GHz) and Low Jitter (<100fs-rms) PLL Design
• High Linearity (1-3% THD) Low-Noise TIA and Laser Driver Design
• Equalization Techniques for Backplanes and Optical Links
• High-Speed Low Latency Clock & Data Recovery Circuits

Requirements:

• Bachelors in Engineering and 12+ years of related experience; or Masters degree in Engineering and 10+ years of related experience

Compensation and Benefits

The annual base salary range for this position is USD 129,400.00 To USD 207,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.