Principal Test Architect - Analog & Mixed-Signal

Renesas Electronics Corp.; Arizona; On-site; USD 180,000 - 260,000; Full time

Job summary

Renesas Electronics Corp. is seeking a Principal Test Architect for the Analog and Mixed-Signal division. You will lead test architecture strategy, collaborate with design and product teams, and drive innovation from NPI through high-volume manufacturing.

Responsibilities include defining DFT requirements, optimizing testability, and mentoring teams on test methodology and best practices for complex semiconductor products.

Qualifications

• BS or MS in Electrical Engineering, Physics, or related technical discipline with 10+ years in semiconductor test engineering.
• Candidates with backgrounds in product engineering, characterization, silicon validation, applications engineering, or analog/mixed-signal IC design and test development will be considered.
• Experience with automatic test equipment (ATE) platforms and production test solutions.

Responsibilities

• Define and drive test architecture, methodology, and innovation for analog and mixed-signal semiconductor products.
• Partner with IC design, product engineering, and test teams to define DFT requirements and optimize testability.
• Architect and optimize mixed-signal test hardware and software to improve test quality, throughput, cost, and manufacturability.
• Evaluate tester roadmap, test methodologies, and process improvements.
• Provide technical leadership and mentorship on test strategies and problem-solving for complex semiconductor products.

Skills

Semiconductor test engineering

ATE development

Test hardware & software design

Wafer sort & final test

Education

BS or MS in Electrical Engineering, Physics, or related technical discipline

Tools

Advantest 93K

ETS

Teradyne FLEX

Diamondx

LTX

SPEA

Job description

Renesas Electronics Corp. is seeking a Principal Test Architect for the Analog and Mixed-Signal division. You will lead test architecture strategy, collaborate with design and product teams, and drive innovation from NPI through high-volume manufacturing.

Responsibilities include defining DFT requirements, optimizing testability, and mentoring teams on test methodology and best practices for complex semiconductor products.