Principal SOC Architect, AI Accelerators (Multiple Locations

Qualcomm; Austin (TX); On-site; USD 172,800 - 304,900; Full time

Benefits offered by this job

Annual discretionary bonus program

RSU grants

Competitive benefits package

Job summary

A leading technology firm in Austin is seeking an experienced SoC architect to work on next-generation AI products in the datacenter. The ideal candidate will define architecture, drive requirements, and work on security and virtualization. A Master's degree in Engineering and significant experience in HW design and datacenter products are required. The position offers a competitive salary range of $172,800 to $304,900 and a comprehensive benefits package.

Qualifications

• 10+ years HW design, testing, and commercialization experience required.
• 3+ years of experience with datacenter related products required.
• In-depth knowledge of datacenter security, RAS, and virtualization needed.

Responsibilities

• Define architecture and drive requirements for SoC implementation.
• Analyze current AI server deployments for enhancements.
• Work with customers to determine HW and SW requirements.

Skills

HW design experience

Datacenter security knowledge

RAS expertise

Virtualization experience

Education

Master's degree or equivalent in Engineering

Bachelor's degree in Science or Engineering

Tools

PCIe protocol knowledge

Knowledge of Ethernet protocols

Job description

Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

Qualcomm is looking for an experienced SoC architect to work on the next generation AI products in the datacenter. We are looking for a data center engineer whose expertise spans security, RAS and/or virtualization. The selected candidate will help define the architecture and drive requirements from card/server level to a full rack.

Responsibilities

• Understand trends in datacenter security, RAS and virtualization through customer and ODM engagements
• Work with customers to determine HW and SW requirements
• Analysis of the current AI server deployments in different datacenters
• Architect enhancements required for deployment of next‑generation AI products

Design the SOC architecture for at least one or more of the following areas:

• RAS
• Reliability analysis of the card, server and rack level systems
• Design/architect for easy serviceability
• Implement HW/SW techniques for improved availability to mitigate failures
• Virtualization
• Support multiple clients using VMs on the same HW platform
• Leverage industry best practices for security and isolation between clients
• Security
• Confidential compute or its equivalent based on datacenter requirements

Minimum Requirements

• Master's degree or equivalent in Engineering, or related field
• 10+ years HW design, testing and commercialization experience
• 3+ years of experience working in datacenter related products – servers, accelerators, etc.
• In-depth knowledge of datacenter – security, RAS, virtualization, telemetry, power, cooling, lifecycle, deployments, etc.
• Good knowledge of scale‑up and scale‑out architectures
• Willingness to work in a high‑caliber international/multi‑site team

Preferred Skills And Experience

• Experience and knowledge of Server SOC security specifically in the area of Confidential Compute
• Participation in OCP Security Forum and Confidential Compute Forum is a plus
• Experience and knowledge in defining RAS infrastructure at the Server SoC level
• Experience and knowledge of PCIe protocol spanning SRIOV, SIOV, IDE, TDISP, etc.
• Good knowledge of server SOC architectures focusing on security, RAS and virtualization
• Good knowledge of Ethernet protocols with emphasis on error recovery and virtualization
• Ability to work with PdM and datacenter customers to define requirements covering security, RAS and virtualization, etc.

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience
• OR Master’s degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work experience
• OR PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience

Pay Range And Other Compensation & Benefits

$172,800.00 – $304,900.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Salary is only one component of total compensation. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants. In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

Legal & EEO Statements

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. Upon request, reasonable accommodations can be provided to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification. Qualcomm expects its employees to abide by all applicable policies and procedures, including security and other requirements regarding protection of company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.