Principal MLIR Compiler Architect for AI Acceleration

Advanced Micro Devices; San Jose (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

AMD is seeking a Principal Software Development Engineer to lead compiler technology and MLIR-based infrastructure for AI workloads on specialized accelerators. You will steer model-to-hardware optimization, enabling high-performance execution across NPUs and other compute engines.

The role sits at the intersection of compiler development, ML frameworks, and AI model execution, requiring broad cross-functional collaboration and technical leadership to shape accelerator software roadmaps.

Qualifications

• Strong background in compiler development spanning front-end, middle-end, and/or back-end
• Hands-on experience with MLIR/LLVM-based infrastructure and high-performance ML workloads
• Proven ability to optimize neural network models and graphs for accelerator hardware

Responsibilities

• Lead architecture design and development of compiler components and optimization pipelines for ML
• Design and implement MLIR-based compiler flows to lower ML representations to hardware-specific code
• Drive model compilation and data movement optimization for ML inference workloads
• Define and implement strategies for operator fusion, memory planning, scheduling, and performance optimization
• Collaborate cross-functionally with hardware, runtime, frontend, and systems teams to align compiler capabilities with accelerator architectures
• Provide technical leadership and mentorship influencing compiler direction and best practices

Skills

Compiler development

MLIR/LLVM

C++ development

Neural network workloads

Graph-level optimizations

Leadership

Education

Bachelor’s or Master’s degree in CS/CE/EE

Tools

MLIR

LLVM

Job description

AMD is seeking a Principal Software Development Engineer to lead compiler technology and MLIR-based infrastructure for AI workloads on specialized accelerators. You will steer model-to-hardware optimization, enabling high-performance execution across NPUs and other compute engines.

The role sits at the intersection of compiler development, ML frameworks, and AI model execution, requiring broad cross-functional collaboration and technical leadership to shape accelerator software roadmaps.