Principal Hardware Systems Architect-Compute Platforms

Celestica; San Jose (CA); On-site; USD 190,000 - 270,000; Full time

Job summary

Celestica is seeking a Principal Hardware Systems Architect for Compute Platforms to provide senior technical leadership for the architecture and development of next‑generation AI, accelerated computing, and high‑performance data center platforms.

The role involves defining architectures for next‑generation compute systems, evaluating tradeoffs, and driving integrated rack and multi‑rack solutions in collaboration with cross‑functional teams.

Qualifications

• Bachelor’s or Master’s degree in EE/CS or related field.
• 12+ years of hardware and system development experience.
• Experience leading system-level architecture for compute platforms.
• Strong knowledge of x86/ARM, GPUs/accelerators, DDR/HBM, PCIe, CXL, NVMe, high-speed interconnects.
• Excellent technical communication and presentation skills.

Responsibilities

• Define compute-platform architectures for AI and HPC.
• Evaluate performance, power, and scalability tradeoffs.
• Collaborate with Networking, Power, Thermal, Firmware, and Validation teams.
• Lead integration of rack and multi-rack AI system architectures.

Skills

Compute Platform Architecture

AI/Accelerator Technologies

System-level Design

Customer Engagement

Education

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or related field

Tools

NVLink/NVSwitch

PCIe/CXL

DDR/HBM

Job description

Summary

Celestica is seeking a Principal Hardware Systems Architect for Compute Platforms to provide senior technical leadership for the architecture and development of next-generation AI, accelerated computing, and high-performance data center platforms.

Req ID: 140082 Region: Americas Country: USA State/Province: California City: San Jose

Summary

Celestica is seeking a Principal Hardware Systems Architect for Compute Platforms to provide senior technical leadership for the architecture and development of next‑generation AI, accelerated computing, and high‑performance data center platforms.

Skills & Responsibilities

Compute Platform Architecture

• Define architecture for next-generation AI, accelerated-compute, server, and high-performance computing platforms.
• Own architectural definition of:
  • CPU architectures
  • GPU and AI accelerator subsystems
  • Memory and HBM architectures
  • PCIe and CXL fabrics
  • Local storage and NVMe architectures
  • GPU/accelerator topology
  • Scale‑up interconnect architecture
  • Compute node and tray architecture
• Establish compute-system requirements, interfaces, partitioning, and architectural tradeoffs.
• Evaluate alternatives based on performance, bandwidth, latency, power, thermal density, reliability, cost, scalability, serviceability, and manufacturability.
• Develop reusable compute‑platform architectures and building blocks that can be leveraged across customers and programs.

AI & Compute Technology Leadership

• Maintain deep technical understanding of evolving CPU, GPU, AI accelerator, memory, storage, and interconnect technologies.
• Track and evaluate technology roadmaps from leading compute ecosystem suppliers including NVIDIA, AMD, Intel, ARM ecosystem companies, and emerging AI accelerator providers.
• Understand emerging AI compute architectures and their implications for:
  • Accelerator density
  • Memory bandwidth
  • PCIe/CXL connectivity
  • Scale‑up fabrics
  • Scale‑out networking
  • Rack power
  • Liquid cooling
  • Rack and cluster architecture
• Lead architectural evaluation of scale‑up technologies, including NVLink/NVSwitch‑class technologies and emerging accelerator interconnects.

Integrated Rack & Multi‑Rack Architecture

• Partner with peer system architects to define integrated rack and multi‑rack architectures spanning compute, networking, power, thermal, mechanical, firmware, and system‑management domains.
• Optimize architecture as a complete AI system rather than as independent compute or networking platforms.
• Partner closely with the Network Architect to establish the interface between accelerator scale‑up architectures and network scale‑out architectures.
• Jointly evaluate system‑level architectural tradeoffs where compute and networking intersect, including:
  • Accelerator density
  • Fabric bandwidth
  • NIC/DPU architecture
  • Switch topology
  • Latency
  • Power consumption
  • Thermal density
  • Reliability
  • Cost
  • Scalability
• Work with Power, Thermal, Mechanical, Reliability, Firmware, and Validation engineering teams to establish system‑level requirements and interfaces.
• Drive architectural thinking from compute node → tray → rack → multi‑rack AI system.

Experience Requirements

Required Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or related technical field.
• Typically 12+ years of relevant hardware and system‑development experience, with significant experience in server, compute, AI, HPC, or data‑center platforms.
• Demonstrated experience defining or leading system‑level architecture for complex compute platforms.
• Strong knowledge of modern server architectures including x86 and/or ARM processors, GPUs/accelerators, DDR/HBM, PCIe, CXL, NVMe/storage, and high‑speed interconnects.
• Strong understanding of the relationships among compute, networking, memory, power, and thermal architecture.
• Experience taking complex platforms from early architecture through development, validation, and production.
• Ability to make and communicate system‑level engineering tradeoffs involving performance, cost, power, thermal, reliability, and schedule.
• Strong technical communication and presentation skills.
• Ability to influence technical decisions across multiple engineering disciplines without relying on direct organizational authority.
• Experience engaging directly with customers, silicon vendors, and technology partners.

Preferred Qualifications

• Experience architecting GPU-based AI training or inference platforms.
• Experience with NVIDIA, AMD, Intel, or other accelerator-based platforms.
• Experience with rack‑scale AI systems and high‑density compute architectures.
• Knowledge of NVLink/NVSwitch‑class technologies or comparable scale‑up fabrics.
• Working knowledge of high‑performance Ethernet and/or InfiniBand scale‑out architectures.
• Experience with advanced liquid‑cooled compute platforms.
• Experience with high‑power rack architectures reaching hundreds of kilowatts per rack.
• Experience working with hyperscale or cloud‑service‑provider customers.
• Experience developing reusable platform architectures.
• Experience contributing to technology roadmaps, invention disclosures, patents, or advanced‑development programs.

Typical Education

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, or related technical field.
• Educational Requirements may vary by Geography

Notes

This job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.

Celestica is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, pregnancy, genetic information, disability, status as a protected veteran, or any other protected category under applicable federal, state, and local laws.

This policy applies to hiring, promotion, discharge, pay, fringe benefits, job training, classification, referral and other aspects of employment and also states that retaliation against a person who files a charge of discrimination, participates in a discrimination proceeding, or otherwise opposes an unlawful employment practice will not be tolerated. All information will be kept confidential according to EEO guidelines.

Celestica is an E-Verify employer.

Company Overview

Celestica (NYSE, TSX: CLS) enables the world’s best brands. Through our recognized customer‑centric approach, we partner with leading companies in Aerospace and Defense, Communications, Enterprise, HealthTech, Industrial, Capital Equipment and Energy to deliver solutions for their most complex challenges. As a leader in design, manufacturing, hardware platform and supply chain solutions, Celestica brings global expertise and insight at every stage of product development – from drawing board to full‑scale production and after‑market services for products from advanced medical devices, to highly engineered aviation systems, to next‑generation hardware platform solutions for the Cloud. Headquartered in Toronto, with talented teams spanning 40+ locations in 13 countries across the Americas, Europe and Asia, we imagine, develop and deliver a better future with our customers.

Celestica would like to thank all applicants, however, only qualified applicants will be contacted.

Celestica does not accept unsolicited resumes from recruitment agencies or fee‑based recruitment services.