Principal Electrical Engineer - FPGA Verification

Raytheon; Marlborough (MA); On-site; USD 108,000 - 205,000; Full time

Job summary

Raytheon’s Radar Digital Products team seeks a Principal Electrical Engineer to verify FPGA-based designs for radar applications, supporting DoD-grade performance. The role may be located in either Tewksbury or Marlborough, MA, and requires deep verification expertise and collaboration across hardware, software, and systems teams.

You will build robust testbenches, drive coverage closure, and contribute to verification plans while working with industry-standard simulators and scripting tools.

Qualifications

• Typically requires a STEM degree and 8+ years of relevant experience.
• Experience in digital design verification and SystemVerilog for design and verification.
• Hands-on experience building UVM-based testbenches from scratch with env, agent, scoreboard, and coverage.

Responsibilities

• Own or contribute to FPGA-based designs for control and signal processing radar applications.
• Verify designs using directed and constrained random tests with self-checking techniques.
• Create verification plans and reports to document progress and results.
• Collaborate with systems, hardware, and software engineers across programs.

Skills

Digital design verification

SystemVerilog

UVM

AXI/PCIe/Ethernet/DDRs

Verifiers: Questa/VCS/Xcelium

Regression management

Git/ClearCase/SVN

VHDL

Scripting: Python/Tcl/Perl

Team collaboration

Education

STEM degree

Tools

Questa

VCS

Xcelium

Vivado

Quartus

Git

ClearCase

SV/UVM

Job description

Location

US-MA-TEWKSBURY-TB1 ~ 50 Apple Hill Dr ~ ASSABET BLDG

Date Posted

2026-08-12

Country

United States of America

Location

US-MA-TEWKSBURY-TB1 ~ 50 Apple Hill Dr ~ ASSABET BLDG

Position Role Type

Onsite

U.S. Citizen, U.S. Person, or Immigration Status Requirements

The ability to obtain and maintain a U.S. government issued security clearance is required. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance

Security Clearance Type

DoD Clearance: Secret

Security Clearance Status

Active and existing security clearance required after day 1

At RTX, the world largest aerospace and defense company, 185,000 great minds are united by purpose and inspired to make a difference solving the world’s most complex problems. With our three market leading businesses, world-class operations and investments in research and development, we offer capabilities and opportunity no one else can. Together, we push the boundaries of known science and find new ways to connect and protect our world.

The Radar Digital Products (RDP) Department at Raytheon is seeking an experienced Principal level Electrical Engineer to verify FPGA based designs for control and/or signal processing radar applications.

This position can be for the Tewksbury, MA location or the Marlborough, MA location.

What You Will Do

• Own or contribute to the successful completion of FPGA-based designs, on time and on budget
• Verify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage using UVM
• Create complete documentation including verification plan and report
• Demonstrate self-motivation, with little supervision required
• Work cooperatively with systems, hardware, software engineers, and program management to ensure product success
• Support internal and external technical reviews

Qualifications You Must Have

• Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 8 years of prior relevant experience
• Digital design verification
• Strong proficiency in SystemVerilog for both design and verification (interfaces, clocking blocks, assertions)
• Hands-on experience building UVM-based testbenches from scratch, including env, agent, scoreboard, and coverage components
• Solid understanding of constrained-random verification and functional coverage methodology
• Familiarity with AXI, PCIe, Ethernet, DDR protocols.
• Experience with industry-standard simulators (e.g., Questa, VCS, Xcelium)
• Experience with regression management and debug of complex, intermittent failures
• Ability to develop and maintain verification plans tied to design specifications and coverage closure criteria
• Experience with version control systems (e.g., Git, ClearCase, SVN) in a team-based development environment

Qualifications We Value

• Proficiency with Git. Branching strategies, pull requests, and collaborative workflows
• Experience with UVMF (UVM Framework) for structured, reusable testbench development
• Familiarity with Vivado and Quartus FPGA simulation flows
• Experience with scripting languages (Python, Tcl, Perl) for test automation and tooling
• Experience designing FPGAs using VHDL
• Familiarity with SLURM workload manager for job scheduling and compute cluster resource management
• Prior experience mentoring junior verification engineers
• Existing DoD security clearance

What We Offer

Our values drive our actions, behaviors, and performance with a vision for a safer, more connected world. At RTX we value: Safety, Trust, Respect, Accountability, Collaboration and Innovation.

This position is eligible for relocation.

Clearance Information: This position requires a security clearance. DCSA Consolidated Adjudication Services (DCSA CAS), an agency of the Department of Defense, handles and adjudicates the security clearance process. More information about Security Clearances can be found on the US Department of State government website here: https://www.state.gov/m/ds/clearances/c10978.htm

Raytheon Information - https://www.youtube.com/watch?v=H26bUpq99zo

As part of our commitment to maintaining a secure hiring process, candidates may be asked to attend select steps of the interview process in-person at one of our office locations, regardless of whether the role is designated as on-site, hybrid or remote.

The salary range for this role is 107,500 USD - 204,500 USD. The salary range provided is a good faith estimate representative of all experience levels. RTX considers several factors when extending an offer, including but not limited to, the role, function and associated responsibilities, a candidate’s work experience, location, education/training, and key skills.

Hired applicants may be eligible for benefits, including but not limited to, medical, dental, vision, life insurance, short-term disability, long-term disability, 401(k) match, flexible spending accounts, flexible work schedules, employee assistance program, Employee Scholar Program, parental leave, paid time off, and holidays. Specific benefits are dependent upon the specific business unit as well as whether or not the position is covered by a collective-bargaining agreement.

Hired applicants may be eligible for annual short-term and/or long-term incentive compensation programs depending on the level of the position and whether or not it is covered by a collective-bargaining agreement. Payments under these annual programs are not guaranteed and are dependent upon a variety of factors including, but not limited to, individual performance, business unit performance, and/or the company’s performance.

This role is a U.S.-based role. If the successful candidate resides in a U.S. territory, the appropriate pay structure and benefits will apply.

RTX anticipates the application window closing approximately 40 days from the date the notice was posted. However, factors such as candidate flow and business necessity may require RTX to shorten or extend the application window.

RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or veteran status, or any other applicable state or federal protected class. RTX provides affirmative action in employment for qualified Individuals with a Disability and Protected Veterans in compliance with Section 503 of the Rehabilitation Act and the Vietnam Era Veterans’ Readjustment Assistance Act.

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