Platform Technologies Language Design Intern

SiFive

Berkeley (CA)

On-site

USD 44,083 - 53,726

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Benefits offered by this job

Healthcare benefits
Retirement plans
Paid time off

Job summary

SiFive is seeking an Intern on the Platform Engineering Technologies team in Berkeley to complete a project aligned with their skills and interests. You will work with cutting‑edge tools for SoC design, applying object‑oriented or functional programming and contributing to open‑source projects such as Chisel and CIRCT.

You will deepen your Scala skills, learn from a collaborative team, and help improve tooling for hardware design while gaining exposure to SiFive’s RISC‑V CPU/IP/SoC ecosystems.

Qualifications

  • Willingness to learn and share knowledge.
  • Ability to communicate and teach others inside and outside the company.
  • Experience with object oriented or functional programming languages.
  • Exposure to hardware design and verification techniques is a plus but not required.

Responsibilities

  • Intern will complete a project specific to their skill set and interest.
  • Support and enhance tools for SoC design on the Platform Engineering Technologies team.
  • Contribute to open source projects such as Chisel and CIRCT while enabling SiFive engineers to build and verify RISC‑V CPUs, IPs and SoCs.

Skills

Scala
Object-oriented programming
Functional programming

Tools

Chisel
CIRCT
Scala

Job description

About SiFive

As the pioneers who introduced RISC‑V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC‑V to the highest performance and most data‑intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC‑V has no limits.

At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.

About SiFive

As the pioneers who introduced RISC‑V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC‑V to the highest performance and most data‑intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC‑V has no limits.

At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.

Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people’s lives; making the world a better place, one processor at a time.

Are you ready?

To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our website and Glassdoor pages.

Job Description
The Role

Interns will complete a project specific to their skill set and interest. Possible projects could include:

  • Adding features to or enhancing the Chisel language for better design and verification

As an Intern on the Platform Engineering Technologies team, you will be responsible for supporting and enhancing cutting‑edge tools for System‑on‑Chip (SoC) design. You will apply your object‑oriented or functional programming skills to enhance domain‑specific languages for hardware design. You will participate in the open‑source Chisel (https://www.chisel-lang.org/) and CIRCT (https://github.com/llvm/circt) communities while ensuring that SiFive engineers have the best tools to build and verify advanced RISC‑V CPUs, IPs, and SoCs. You will be part of a tight‑knit, supportive, challenge‑loving team who likes to learn and apply new technologies to change the paradigm of designing custom silicon.

What You Will Learn
  • You will deepen your functional programming skills in Scala
  • You will contribute to an open source project used in an industry setting
  • You will learn how to take user feedback and improve their experience by improving the tools you provide them
Requirements
  • Willingness to learn and share
  • Ability to communicate and teach others both inside and outside the company
  • Experience with object oriented or functional programming languages
  • Exposure to hardware design and verification techniques is a plus but not required.
Pay & Benefits
  • Base Pay Range: $32.40-$39.00
  • Variable/incentive compensation and/ or equity may be eligible
  • Comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!
Additional Information

This position requires a successful background and reference checks and satisfactory proof of your right to work in United States of America.

Any offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export‑controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.

SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.

As an E‑Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I‑9, Employment Eligibility Verification, upon hire. We do not use E‑Verify to pre‑screen job candidates and will comply with all E‑Verify regulations.

California residents: please see our job candidate notice for more information on how we handle your personal information and your privacy rights: Privacy Policy Document.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Platform Technologies Language Design Intern
Platform Technologies Language Design Intern

SiFive • Santa Clara (CA)

On-site
Comprehensive benefits
Platform Technologies Language Design Intern
Platform Technologies Language Design Intern

SiFive • South Carolina

On-site
USD 44,000 - 54,000
Platform Technologies Language Design Intern
Platform Technologies Language Design Intern

SiFive, Inc. • Santa Clara (CA)

On-site
Variable/incentive compensation
Equity
Healthcare
Platform Technologies Language & Frontend Design Engineer
Platform Technologies Language & Frontend Design Engineer

SiFive • South Carolina

On-site
USD 140,000 - 171,000
Healthcare benefits
Equity
Platform Technologies Language & Frontend Design Engineer
Platform Technologies Language & Frontend Design Engineer

SiFive • Berkeley (CA)

On-site
USD 139,000 - 171,000
Comprehensive benefits package
Healthcare
Retirement plans
+1
Intern - Design Verification Infrastructure Engineer - Platform
Intern - Design Verification Infrastructure Engineer - Platform

SiFive • Boston (MA)

On-site
USD 120,000 - 190,000
Intern - Design Verification Infrastructure Engineer - Platform
Intern - Design Verification Infrastructure Engineer - Platform

SiFive • Austin (TX)

On-site
USD 140,000 - 190,000
Platform Technologies Language & Frontend Design Engineer
Platform Technologies Language & Frontend Design Engineer

SiFive • Boston (MA)

On-site
USD 139,000 - 171,000
Healthcare
Retirement plans
Paid time off
+1
Senior Staff RTL Design Engineer - CPU Frontend
Senior Staff RTL Design Engineer - CPU Frontend

SiFive • Santa Clara (CA)

On-site
USD 206,000 - 251,000
Healthcare benefits
Retirement plans
Interconnect Design Engineer
Interconnect Design Engineer

Socket.dev • Santa Clara (CA)

On-site
USD 140,000 - 171,000
Healthcare
Retirement plans
Paid time off