PhD ML Systems Intern: Optimize LLMs on AI NPU

Advanced Micro Devices; San Jose, Santa Clara (CA, CA); Hybrid; USD 42,000 - 64,000; Full time

Job summary

Advanced Micro Devices (AMD) is seeking a motivated ML System Engineering co‑op/intern in San Jose, CA. You will work full‑time in a hybrid or onsite structure on a project to accelerate LLM/VLM workloads on the Ryzen AI NPU, starting with profiling memory and compute and proposing changes.

You’ll learn how a transformer maps to tiled dataflow accelerators, gain exposure to production AI compilers, and present findings to the team.

Qualifications

• Pursuing a PhD in CS/CE/EE.
• Strong Python and C++ skills.
• Experience with compilers (graph lowering, operator fusion, tiling, memory planning). MLIR/IRON is a plus.

Responsibilities

• Own your project: accelerate LLM/VLM workloads on Ryzen AI NPU by profiling time/memory and proposing changes.
• Write and tune AIE kernels with IRON to optimize GEMM, attention, and related ops.
• Present findings to the wider engineering team and document learnings for reuse.

Skills

Python

C++

MLIR experience

Profiling performance

Compiler techniques

LLM/VLM basics

Education

PhD in CS/CE/EE

Tools

IRON

AMD AI Engine (AIE)

MLIR

Job description

Advanced Micro Devices (AMD) is seeking a motivated ML System Engineering co‑op/intern in San Jose, CA. You will work full‑time in a hybrid or onsite structure on a project to accelerate LLM/VLM workloads on the Ryzen AI NPU, starting with profiling memory and compute and proposing changes.

You’ll learn how a transformer maps to tiled dataflow accelerators, gain exposure to production AI compilers, and present findings to the team.