PDK Testsite Engineer

Computer Task Group, Inc; United States; A distancia; USD 99.000 - 102.000; Jornada completa

Descripción de la vacante

CTG, a Cegeka company, seeks a remote IC design engineer to design testsites, testchips, and PDK components, and to verify layouts using Cadence Virtuoso. The role emphasizes process technology characterization and silicon validation.

You will translate technology specs into silicon-ready layouts, perform DRC/LVS checks, and automate related workflows while collaborating with cross-functional teams. Strong English communication is required.

Formación

• Experience designing test structures and test sites for semiconductor processes.
• Strong knowledge of Cadence Virtuoso and layout verification.
• Familiarity with DRC/LVS and PDK validation processes.

Responsabilidades

• Design and develop semiconductor testsites, testchips, and device structures.
• Create physical layouts using Cadence Virtuoso or similar EDA tools.
• Translate specifications into test structures and silicon-ready layouts.
• Interpret design rules, ground rules, and layout specs.
• Perform and debug DRC/LVS and other physical verifications.
• Automate testsite generation, layout, verification, and data-processing workflows.
• Document testsite designs, verification methodologies, results, and findings.
• Collaborate with process development, device modeling, design enablement, layout, CAD/EDA, test, and manufacturing teams.

Conocimientos

Cadence Virtuoso

IC design and layout

DRC LVS

PDK development

PCells

Python scripting

Tcl scripting

Documentation

Cross-functional communication

Semiconductor devices knowledge

Educación

Bachelor's degree in Electrical Engineering, Computer Engineering, Microelectronics, Physics, or related technical discipline

Herramientas

Synopsys IC Validator (ICV)

Siemens Calibre

SKILL scripting

Python scripting

Tcl scripting

Descripción del empleo

Location

Remote

Duration

6 months

Duties

• Design and develop semiconductor testsites, test chips, and device-level structures for process technology characterization and Process Design Kit (PDK) development.
• Create and modify physical layouts using Cadence Virtuoso or comparable electronic design automation (EDA) tools.
• Translate process characterization and device modeling requirements into test structures and silicon-ready layouts.
• Interpret semiconductor design rules, technology ground rules, and layout specifications.
• Perform and debug physical verification, including Design Rule Checking (DRC) and Layout Versus Schematic (LVS).
• Support testsite development through design, verification, tapeout preparation, and silicon characterization.
• Analyze electrical measurement and silicon test results to identify device, interconnect, process, and design issues.
• Support the development and validation of PDK components, including device definitions, parameterized cells (PCells), technology files, models, and verification flows.
• Develop and maintain scripts to automate testsite generation, layout, verification, and data-processing workflows.
• Troubleshoot layout, PDK, physical verification, and EDA tool issues.
• Document testsite designs, verification methodologies, results, and engineering findings.
• Collaborate with process development, device modeling, design enablement, layout, CAD/EDA, test, and manufacturing teams.

Skills

• Proficiency with Cadence Virtuoso or similar integrated circuit design and physical layout tools.
• Understanding of semiconductor devices, fabrication processes, physical layout, and technology characterization.
• Knowledge of semiconductor design rules, DRC/LVS, and physical verification methodologies.
• Ability to translate technology specifications and characterization requirements into functional test structures.
• Strong analytical, troubleshooting, debugging, and problem-solving skills.
• Ability to interpret electrical measurement results and support silicon-level analysis.
• Experience with PDK development, validation, or related semiconductor design enablement activities.
• Strong technical documentation and cross-functional communication skills.

Experience

• Experience developing semiconductor test structures, testsites, test chips, physical layouts, or PDK components.
• Experience using Cadence Virtuoso or comparable IC design and layout tools.
• Experience with semiconductor design rule implementation and physical verification.
• Preferred experience with Cadence SKILL programming, Python, Tcl, or similar scripting languages.
• Preferred experience developing PCells, layout automation, or verification workflows.
• Familiarity with Synopsys IC Validator (ICV), Siemens Calibre, or comparable physical verification tools is a plus.
• Experience with PDK development and validation, advanced semiconductor technology nodes, device characterization, or electrical measurement techniques is preferred.
• Experience supporting test structures or test chips through design verification and tapeout is an advantage.

Education

• Bachelor's degree in Electrical Engineering, Computer Engineering, Microelectronics, Physics, or a related technical discipline, or equivalent relevant experience.

Excellent verbal and written English communication skills and the ability to interact professionally with a diverse group are required.

The expected base salary for this position ranges from $72.00 to $74.00/hour. Salary offers are based on a wide range of factors including relevant skills, training, experience, education, market factors, and where applicable, licensure or certifications obtained. In addition to salary, a competitive benefit package is also offered.

About CTG

CTG, a Cegeka company, delivers IT and business solutions that enhance clients’ digital agility, empowering them to seize new opportunities and overcome any challenge. Backed by more than 60 years’ experience and a commitment to being a reliable, results-driven partner, we work shoulder to shoulder with clients to shape digital together. Our vision is to be an indispensable partner to our clients and the preferred career destination for digital and technology experts. With more than 9,000 team members in over 15 countries, we combine global expertise with local insight to deliver innovative solutions. We operate across the Americas, Europe, and India, working with over 3,000 clients in many of today's highest-growth industries.

Together, we shape what’s next—working shoulder to shoulder to deliver impactful solutions for our clients and society. Our culture is built by the people who work at CTG, the values we hold, and the actions we take. It's a living, breathing thing that is renewed every day through the ways we engage with each other, our clients, and our communities. At CTG, you’ll find a workplace where you are encouraged to grow, supported in your ambitions, and empowered to shape your own career journey. For more information, visit www.ctg.com.

CTG will consider for employment all qualified applicants including those with criminal histories in a manner consistent with the requirements of all applicable local, state, and federal laws.

CTG is an Equal Opportunity Employer. CTG will assure equal opportunity and consideration to all applicants and employees in recruitment, selection, placement, training, benefits, compensation, promotion, transfer, and release of individuals without regard to race, creed, religion, color, national origin, sex, sexual orientation, gender identity and gender expression, age, disability, marital or veteran status, citizenship status, or any other discriminatory factors as required by law. CTG is fully committed to promoting employment opportunities for members of protected classes.