PCIe / CXL and HSIO Validation Engineer

AMD; Austin (TX); On-site; USD 120,000 - 160,000; Full time

Job summary

AMD in Austin, TX is seeking a Principal Validation Engineer to join our datacenter CPU post silicon validation team. This role involves developing and executing validation test plans for SoC features, particularly in high-speed IO domains like PCIe and CXL. The successful candidate will collaborate with diverse teams and drive improvement in validation methodologies, ensuring high-quality product delivery.

Applicants should have a degree in EE/CS, extensive SOC experience, and strong communication skills. Join AMD and be part of a culture that values innovation and collaboration.

Qualifications

• Proven hands-on experience in SOC design or validation of high-speed IO interfaces.
• Experience developing validation methodologies and infrastructure.
• Strong analytical/problem-solving skills and attention to detail.

Responsibilities

• Develop and execute validation test plans for SoC features.
• Collaborate with cross-functional teams to improve validation strategies.
• Conduct root-cause analysis for SoC related issues.

Skills

Experience in SOC design or validation

Hands-on experience with high-speed IO interfaces

Knowledge of PCIe Gen5/6+, CXL

Debug skills at SoC and system level

Familiarity with programming languages (C/C++, Python, Perl)

Strong verbal and written communication skills

Education

BSEE/CSE/CS with 7+ years of experience

MSEE/CSE/CS with 5+ years of experience

Tools

Protocol/logic analyzers

Oscilloscopes

Job description

What You Do at AMD

At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

The Role

We are looking for a dynamic, energetic, and visionary principal validation engineer to join our growing datacenter CPU post silicon validation team, in particular in the areas of highspeed IO such as PCI Express and Compute Express Link (CXL), multi‑socket and inter‑die interfaces. As a key contributor to the success of AMD’s product, you will be part of a leading team to drive and improve AMD’s abilities to deliver the highest quality, industry‑leading technologies to market. The Systems Design Engineering and validation team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

Key Responsibilities

• Develop and execute feature enablement and validation test plans for SoC‑ and system‑level SoC features across all AMD Server products for High‑Speed IO
• Develop test content for both focused testing as well as system level stress testing of IO domain plus cross product stress testing
• Develop post‑silicon validation infrastructure (software, hardware, automation environment, and lab setup)
• Test interactions between various SoC features using validation infrastructure
• Debug and drive root‑cause analysis for SoC related issues
• Collaborate with cross‑functional teams in developing tools to improve SoC validation and debug
• Work with cross‑functional teams to improve post‑silicon validation test strategy, methodology, and process

Preferred Experience

• Proven hands‑on experience in SOC design or validation of high speed IO interfaces
• Experience in PCIe Gen5/6+, CXL, UCIe or proprietary inter‑die and multi‑socket server interface in either electrical or functional or both
• Understanding of modern x86 microprocessor architecture and Server platform architecture is highly desired
• Experience developing validation methodologies and infrastructure
• Test plan and workload development experience
• Participated in silicon bring up and debug, support to internal engineering teams
• Able to execute and drive success of programs with multiple projects on the go
• Debug skills at both SoC and system level
• Familiarity with programming / scripting language (C/C++, Python, Perl,...)
• Working knowledge of Server OSes (Linux, Windows)
• Must be a self‑starting team player with excellent communication skills who can work with minimal guidance
• Forward thinker that drives improvement to development process, code architecture and fosters a spirit of innovation and continuous improvement
• Strong verbal and written English communication skills
• Extensive experience with common lab equipment, including protocol/logic analyzers, oscilloscopes, etc.
• Extensive experience with board/platform‑level debug, including delivery, sequencing, analysis, and optimization
• Extensive knowledge of system architecture, technical debug, and validation strategy
• Strong analytical/problem‑solving skills and pronounced attention to details

Academic Credentials

• BSEE/CSE/CS with 7+ years of experience
• MSEE/CSE/CS with 5+ years of experience

Location and Additional Information

Locations: Austin, TX; Santa Clara, CA; Seattle, WA; Phoenix, AZ

This role is not eligible for visa sponsorship.

Equal Opportunity Statement

AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.