New College Grad - Memory System Architect, HBM Generative AI

Micron Technology; Folsom (CA); On-site; USD 103,000 - 210,000; Full time

Benefits offered by this job

Medical Insurance

Dental Insurance

Vision Insurance

Paid Time Off

Paid Holidays

Equity

Job summary

Micron Technology is seeking a Memory System Architect for the HBM Architecture team to shape future memory architectures supporting Generative AI and data-heavy workloads. You will research memory system concepts, analyze AI accelerator architectures, and build models guiding product strategy and roadmaps for next-generation memory solutions.

The role involves evaluating memory hierarchy optimizations, collaborating with cross-functional teams, and contributing to architecture recommendations

Qualifications

• 0-2 years of relevant experience in computer architecture, memory systems, AI hardware, or HPC.
• Master's degree, PhD, or equivalent experience in Computer Architecture, Electrical Engineering, Computer Engineering, CS, or related field.
• Strong understanding of GPU, TPU, AI accelerator, or large-scale computing architectures.
• Knowledge of memory hierarchy concepts including caches, HBM, DRAM, storage systems, and memory performance optimization.
• Experience with performance modeling, architectural simulation, system analysis, or related research methodologies.
• Programming experience in Python, C++, and/or AI computing frameworks such as CUDA, TensorFlow, or similar technologies.
• Strong analytical, problem-solving, communication, and collaboration skills.
• Familiarity with AI-enabled tools and large language models (LLMs) such as Copilot, Claude, or similar technologies.

Responsibilities

• Research and evaluate advanced memory architecture concepts for AI accelerators, including GPU, TPU, and emerging compute platforms.
• Develop and analyze system-level models to assess performance, power, scalability, and efficiency across memory and compute architectures.
• Investigate memory hierarchy optimizations involving HBM, DRAM, cache, storage, and interconnect technologies.
• Evaluate architectural trade-offs and emerging technologies, including compute-near-memory concepts, to support future product development.
• Collaborate with cross-functional teams to translate research findings into architecture recommendations and long-term technology roadmaps.

Skills

GPU/TPU/AI accelerator architectures

Performance modeling

Python

C++

CUDA/TensorFlow

Education

Master's degree or PhD in Computer Architecture or related field

Tools

CUDA

TensorFlow

Job description

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

The HBM Architecture team defines the future of memory systems that enable next-generation AI, machine learning, and high-performance computing applications. By researching advanced memory architectures, system designs, and emerging technologies, the team develops innovative solutions that maximize performance, scalability, and efficiency for future memory products.

As a Memory System Architect on the HBM Architecture team, you will contribute to the definition of future memory architectures supporting Generative AI and data-intensive workloads. You will research and evaluate advanced memory system concepts, analyze AI accelerator architectures, and develop models that guide product strategy and technology roadmaps for next-generation memory solutions.

Responsibilities

• Research and evaluate advanced memory architecture concepts for AI accelerators, including GPU, TPU, and emerging compute platforms.
• Develop and analyze system-level models to assess performance, power, scalability, and efficiency across memory and compute architectures.
• Investigate memory hierarchy optimizations involving HBM, DRAM, cache, storage, and interconnect technologies.
• Evaluate architectural trade-offs and emerging technologies, including compute-near-memory concepts, to support future product development.
• Collaborate with cross-functional teams to translate research findings into architecture recommendations and long-term technology roadmaps.

Minimum Qualifications

• 0-2 years of relevant experience through research, internships, academic projects, publications, or industry experience in computer architecture, memory systems, AI hardware, or high-performance computing.
• Master's degree, PhD, or equivalent experience in Computer Architecture, Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
• Strong understanding of GPU, TPU, AI accelerator, or large-scale computing architectures.
• Knowledge of memory hierarchy concepts, including caches, HBM, DRAM, storage systems, and memory performance optimization.
• Experience with performance modeling, architectural simulation, system analysis, or related research methodologies.
• Programming experience in Python, C++, and/or AI computing frameworks such as CUDA, TensorFlow, or similar technologies.
• Strong analytical, problem-solving, communication, and collaboration skills.
• Familiarity with AI-enabled tools and large language models (LLMs) such as Copilot, Claude, or similar technologies.

Preferred Qualifications

• Research experience in AI accelerators, computer architecture, memory systems, high-performance computing, or large-scale distributed systems.
• Experience with compute-near-memory, processing-in-memory, or advanced memory architecture concepts.
• Publications, conference presentations, patents, or demonstrated technical contributions in relevant research areas.
• Familiarity with industry-standard memory technologies, interfaces, and protocols.
• Experience developing architectural roadmaps, technology strategies, or long-term product planning recommendations.
• Knowledge of rack-scale systems, AI infrastructure, networking, or large-scale training and inference environments.

The US base salary range that Micron Technology estimates it could pay for this full-time position is: $103,000.00 - $210,000.00 a year

Additional Compensation May Include Benefits, Bonuses And Equity.

Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job‑related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.