New College Grad - Design Engineer, HBM DFT

Micron Technology; Richardson (TX); On-site; USD 70,000 - 90,000; Full time

Benefits offered by this job

Choice of medical, dental, and vision plans

Paid time-off and holidays

Income protection programs

Job summary

Micron Technology, based in Richardson, Texas, seeks an entry-level DFT Design Engineer to help ensure testability and quality for next-generation High Bandwidth Memory (HBM) products. The role involves assisting in scan implementation and working closely with multi-functional engineering teams.

Candidates should have a relevant Bachelor's or Master's degree, be familiar with digital design fundamentals, and have a keen interest in learning advanced DFT concepts. Micron offers robust benefits including health insurance, paid time off, and an inclusive workplace.

Qualifications

• 0–3 years of experience in ASIC/SoC design or verification.
• Basic understanding of sequential logic and timing concepts.
• Familiarity with DFT tools or methodologies.

Responsibilities

• Assist with scan insertion and integration of DFT features.
• Support hierarchical DFT integration for multi-channel HBM structures.
• Run and debug DFT checks like scan DRC and X-propagation.

Skills

Digital design fundamentals

Experience with SystemVerilog or Verilog

Artificial Intelligence workflows

Education

Bachelor’s or Master’s degree in Electrical Engineering or Computer Engineering

Job description

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

As part of the Design for Test (DFT) Engineering team, this role contributes to enabling testability and quality for next-generation High Bandwidth Memory (HBM) products. The team focuses on integrating and validating robust DFT features to support efficient silicon bring‑up and yield ramp, working closely with multi‑functional engineering groups.

In this entry‑level role, the DFT Design Engineer supports the design, simulation, and validation of DFT structures within HBM designs. This includes assisting with scan implementation, test integration, and debug activities while learning standard methodologies from experienced engineers and contributing to high‑quality silicon development.

Responsibilities

• Assist with scan insertion and integration of DFT features including test modes, clocks, resets, and clock control mechanisms
• Support hierarchical DFT integration for multi‑channel or replicated HBM structures and help implement IJTAG and P1500 functionality
• Run and debug DFT checks such as scan DRC, chain integrity, and X‑propagation issues in test mode
• Support simulation and debug activities including ATPG readiness, test‑mode sequencing, and MBIST validation for selected memories
• Collaborate with RTL, DV, PD, and Product/Test Engineering teams to resolve integration issues and participate in build reviews

Minimum Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or equivalent
• 0–3 years of experience or relevant internship/research experience in ASIC/SoC design, DFT, or verification
• Basic understanding of digital design fundamentals including sequential logic, clocks/resets, and timing concepts
• Experience or familiarity with synthesizable RTL such as SystemVerilog or Verilog
• Experience working with or leveraging Artificial Intelligence or AI‑Enabled tools and workflows in engineering environments, or demonstrated exposure to data‑driven methodologies supporting design, validation, or productivity improvements

Preferred Qualifications

• Basic understanding of DFT concepts such as scan, MBIST, or boundary scan/JTAG
• Exposure to DFT tools or methodologies through coursework, projects, or internships
• Familiarity with test access mechanisms, ATPG preparation, or gate‑level simulation concepts
• Interest in learning advanced DFT practices and high‑speed memory design environments
• Experience applying Artificial Intelligence or working with AI Assisted or AI Augmented approaches to enhance engineering workflows, debug efficiency, or test methodology development

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time‑off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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To learn more about Micron, please visit micron.com/careers

For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at [e-mail] or 1-800-336-8918 (select option #3)

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.

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