Mixed-Signal Verification Engineer for RF SoCs

Analog Devices; Wilmington (MA); On-site; USD 87,000 - 120,000; Full time

Benefits offered by this job

Discretionary bonus

Medical, vision and dental

401k

Paid vacation and holidays

Job summary

Analog Devices, Inc. is seeking an engineer to develop analog circuit models and mixed-signal verification environments for advanced data-converter ICs.

You will collaborate with design teams to ensure accurate models and robust verification strategies, enabling reliable product outcomes. This role requires 2+ years in pre-silicon verification, strong SystemVerilog/SystemC skills, and experience with VerilogAMS, Python, and C/C++.

Qualifications

• MSEE or BSEE with 2+ years of industry experience in pre-silicon mixed signal verification
• Proficiency and expertise modeling analog circuits with SystemVerilog (including RNM), VerilogAMS, or SystemC.
• Experience with circuit design, simulation, and verification.
• Experience with Perl, Python, C/C++
• Strong teamwork and time management skills, self-direction, and the desire to excel.

Responsibilities

• Develop analog circuit models and system models that enable efficient and accurate verification of functionality and connectivity within the integrated system.
• Work closely with design and architecture teams to ensure that the developed models are adequate functional models.
• Implement mixed-signal simulation testbenches that verify the product’s usage scenarios.
• Communicate with design team to resolve issues found during verification.

Skills

SystemVerilog

VerilogAMS

SystemC

C/C++

Python

Perl

Teamwork

Education

MSEE or BSEE

Tools

MATLAB

RTL

SystemVerilog

SystemC

Virtuoso

Incisive

Spectre

Job description

Analog Devices, Inc. is seeking an engineer to develop analog circuit models and mixed-signal verification environments for advanced data-converter ICs.

You will collaborate with design teams to ensure accurate models and robust verification strategies, enabling reliable product outcomes. This role requires 2+ years in pre-silicon verification, strong SystemVerilog/SystemC skills, and experience with VerilogAMS, Python, and C/C++.