Memory Test Applications Engineer - Customer-Facing

LitePoint; San Jose (CA); On-site; USD 139,000 - 223,000; Full time

Benefits offered by this job

On-site in San Jose, CA

Discretionary bonus

Health benefits

Job summary

Teradyne's Memory Test Division is seeking an experienced memory test engineer to lead customer engagements, support device bring-up, and influence tester platform roadmaps. This on-site role is based in San Jose, CA.

You will work with engineering, marketing, and product teams to deliver robust test programs for DRAM and NAND, develop demonstrations and enablement materials, and travel up to 20% domestically and internationally.

Qualifications

• BSEE or related field, or equivalent experience.
• 7+ years of experience in memory semiconductor ATE engineering.
• Experience developing, debugging, and correlating memory test programs.
• Understanding of wafer sort and final test methodologies.
• Proficiency in C/C++ programming for test applications.
• Strong hardware and software debug capability.
• Hands-on experience testing DRAM and NAND.

Responsibilities

• Lead customer engagements and technical escalations for advanced memory devices, including device bring-up, characterization, and yield ramp.
• Develop and deploy robust test program methodologies, characterization flows, and correlation strategies for memory products such as DRAM, and NAND.
• Partner with Engineering, Marketing, and Product Management to provide customer-driven input into tester hardware and software roadmaps.
• Build technical demonstrations, documentation, and enablement materials to support customer evaluations and internal readiness.
• Support cross-functional alignment on feature requirements, system validation, and deployment strategies.
• Act as a trusted technical interface for global customers during evaluation, production ramp, and mass-production deployment.
• Drive timely resolution of critical customer issues through structured debug, root-cause analysis, and scalable corrective actions.

Skills

C/C++ programming

Memory test engineering

Education

BSEE or related field

Tools

Nextest Magnum

Advantest memory test platforms

Job description

Teradyne's Memory Test Division is seeking an experienced memory test engineer to lead customer engagements, support device bring-up, and influence tester platform roadmaps. This on-site role is based in San Jose, CA.

You will work with engineering, marketing, and product teams to deliver robust test programs for DRAM and NAND, develop demonstrations and enablement materials, and travel up to 20% domestically and internationally.