Member of Technical Staff - ML Performance

Veeda Innovation; Northern (KY); Hybrid; USD 150,000 - 230,000; Full time

Job summary

Veeda AI is seeking a Member of Technical Staff - ML Performance to optimize distributed training and inference for large-scale video models. You will drive throughput, profile bottlenecks, and implement kernel-level enhancements across PyTorch, CUDA, and specialized parallelism stacks.

The role requires deep experience with FSDP2, Megatron-Core, TorchTitan, or DeepSpeed, plus strong Python/C++ skills. Location in the US is expected, with a focus on scalable acceleration across GPU clusters.

Qualifications

• Experience with PyTorch and large-scale multi-node parallelism stacks on real workloads.
• Fluency in Python and C++/CUDA, with kernel performance intuition.
• Proven ability to profile training/inference and translate traces into gains.

Responsibilities

• Own training throughput and mix parallelism for multi-node video world model training.
• Profile latency, GPU utilization, memory pressure, and improve throughput with optimizations.
• Tune kernels and integrations to reduce step time and enable efficient attention.
• Optimize communication and overlap across NVLink and NCCL for scalability.
• Develop fault diagnostics and asynchronous checkpointing to reduce downtime.

Skills

PyTorch

Python

C++/CUDA

FSDP2

Megatron-Core

DeepSpeed

TorchTitan

Profiling

Education

Bachelor's degree in Computer Science or related field

Tools

Nsight Systems

PyTorch Profiler

CUDA

NCCL

torch.compile

Triton

CuTe-DSL

Job description

Member of Technical Staff - ML Performance

About Us

Veeda AI is building the next generation of multimodal foundation world models for Physical AI. We're a small, fast-moving team of engineers and researchers from leading AI labs, tackling some of the most challenging problems at the intersection of AI, robotics, and embodied intelligence. If you're excited about pushing the boundaries of what's possible with Physical AI, you'll have the opportunity to make an outsized impact from day one.

Responsibilities

• Distributed Training Throughput: Own step time and model FLOPs utilization for multi-node video world model training, choosing the tensor, context, and expert parallelism mix in PyTorch FSDP2 and Megatron-Core rather than inheriting a default.

• Inference Throughput Optimization: Profile end-to-end latency, GPU utilization, memory pressure, and kernel efficiency with PyTorch Profiler, Nsight Systems, Nsight Compute, and torch.utils.benchmark, then improve throughput through torch.compile/Inductor, CUDA Graphs, mixed and low precision, quantization, operator fusion, and multi-GPU serving.

• Precision & Numerical Stability: Take BF16, FP8, and NVFP4 recipes from running to converging on Blackwell, chasing scaling-factor and accumulation bugs into the video tokenizer and VAE layers where the activation outliers actually live.

• Kernels & Compilation: Write and tune the CUDA and Triton kernels PyTorch does not give us, driving FlashAttention-4, FlexAttention, and torch.compile integration so quadratic attention over long video sequences stops setting step time.

• Communication & Overlap: Tune NCCL collectives and compute/communication overlap across NVLink domains and the fabric, using the NCCL flight recorder to turn a watchdog timeout into a named rank and collective, not a restart.

• Fault Diagnostics & Recovery: Build the detection layer for silent data corruption (SDC), stuck CUDA kernels, and "card-freeze" hangs, plus asynchronous and tiered checkpointing that makes an interruption cost minutes rather than a day.

Requirements

• Bachelor's degree or equivalent hands-on experience in Computer Science, Computer Engineering, or a related technical field.

• Deep hands-on experience with PyTorch and at least one large-scale parallelism stack (FSDP2, Megatron-Core, TorchTitan, or DeepSpeed) on real multi-node jobs, not single-node approximations.

• Fluency in Python and C++/CUDA with the ability to predict where a kernel will stall from its memory access pattern before profiling.

• Experience profiling live training and inference runs with Nsight Systems or the PyTorch profiler and translating traces into quantifiable step-time or MFU improvements.

• Expertise in at least one of low-precision numerics, kernel authoring, or large-run fault diagnosis, and credibility in the others.

Nice to Have

• Experience optimizing training or inference workloads across very large GPU clusters, including topology-aware placement, scaling efficiency, performance isolation, and diagnosing failures that emerge only at fleet scale.

• Experience writing Triton, CUTLASS, or CuTe-DSL kernels, or contributing to open-source kernel libraries.

• Experience implementing context or sequence parallelism for long-horizon video or high-token-count models.

• Experience running or porting large training workloads on AMD GPUs (ROCm) or Google TPUs (JAX/XLA).

• Experience building fault-tolerant training with elastic world size, dynamic node re-queueing, or asynchronous distributed checkpointing.

• Experience optimizing generative inference for interactive rollouts, including few-step samplers, distillation, and KV or latent caching.

• Publications or presentations on machine learning systems, compilers, or high-performance kernels.