Mask Design Engineer

Stem Xpert; Hillsboro (OR); On-site; USD 90,000 - 130,000; Full time

Job summary

A leading technology company in Hillsboro, OR, is looking for an experienced Mask Design Engineer. The ideal candidate will have 4-8 years of experience in Analog and Mixed Signal design and will lead the Mask Design team. Must be proficient in using EDA tools like Cadence and Mentor Graphics. Responsibilities include layout design, verification, and collaborating with the Circuit Design team. This long-term role offers opportunities for advanced technical engagement in a dynamic environment.

Qualifications

• At least 4 – 8 years’ experience in Analog and Mixed Signal design.
• Deep understanding of deep sub-micron layout techniques.
• Good debugging skills and reliability analysis knowledge.

Responsibilities

• Lead the Mask Design team and interface with the Circuit Design team.
• Handle layout design and verification for high performance blocks.
• Conduct physical verification checks using EDA tools.

Skills

14nm

Genesys

Genoa

Voltage regulators

LDO

Analog and Mixed Signal design

CMOS process technology

EDA tools

Layout design

Tools

Cadence

Mentor Graphics

Apache tools

Job description

Founded in 2009 and headquartered in Ann Arbor, MI, TEKWISSEN™ provides a unique portfolio of innovative capabilities that seamlessly combines clients insights, strategy, design, software engineering and systems integration. Our tightly integrated offerings are tailored to each client’s requirements and span the services spectrum from Application Development/Maintenance, testing, Technology Consulting & staffing. The company is primarily focused on information technology, engineering, healthcare, financial technology and contingent workforce solutions. It operates in seven business segments including Commercial, Professional & Technical, EMEA Commercial, and EMEA Professional & Technical. The company provides professional and technical expertise in the fields of Telecom, Education, Banking, Retail, e-commerce, Automotive, Life Science, Insurance, legal, healthcare, among others. It also offers outsourcing, consulting, recruitment, career transition, and vendor management services.

We strongly believe: "If something cannot be measured, it cannot be managed." TEKWISSEN™ measures all of these processes and applies corrective interventions to manage the quality process at its core.

We are an Equal Employment Opportunity Employer M/F/V/D

Recognitions:

• 2015 - America’s Fastest Growing Company by Inc.com
• 2015 - SPARK FastTrack Award from Ann Arbor SPARK
• 2015 - Honoree of Diversity Focused Company by Corp! Magazine
• 2014 - America’s Fastest Growing Company by Inc.com
• 2014 - Michigan 50 Companies to Watch
• 2014 – DiSciTech Award in Technology by Corp! Magazine
• 2014 - DiSciTech TECHNOLOGY Company of the year by Corp! Magazine
• 2014 - SPARK FastTrack Award from Ann Arbor SPARK

Specialties:

• Enterprise Solutions
• Web Development
• Data Warehousing
• Systems Integration
• IT Security
• Storage Technologies
• Development and Delivery
• Business Intelligence
• Telecommunications
• Consulting and Planning
• Network design, Implementation & Administration

Job Description

Mask Design

Location: Hillsboro, OR

Duration: Long Term

Job Description:

Manditory skills:

• 1. 14nm
• 2. Genesys, Genoa
• 3. Voltage regulators, LDO

• At least 4 – 8 years’ experience in understanding and independent handling of various Analog and Mixed Signal blocks such as LDO, Switching Regulators, Data Converters, PLL, SerDes, LVDS and top level layout integration of AMS blocks.
• Good Understanding of deep sub-micron layout techniques and issues in CMOS process technology nodes like 14nm, 22nm, 16nm FinFET technologies.
• Experience in Genesys / Genoa layout editor, Aapr flow, Helix, etc.
• Good debugging skills in all physical verification checks like LVS, DRC, DFM, ANTENNA, ERC, SOFT, OPC, etc.
• Deep understanding of reliability analysis in layout like EM, IR drop, latch‑up, ESD etc using Apache tools.
• Should have good knowledge of CMOS, FinFET process and fabrication.
• Knowledge of scripting languages such as Perl/Tcl and Skill is a plus.
• Full‑chip integration and verification experience.
• Good team player with excellent communication skills, interfacing with the circuit team.
• Layout design, Verification, Post‑layout fixes and sign‑off of high performance of Analog and Mixed Signal blocks, and IO / High Speed IO blocks.
• Mask Design team lead for the client engagement.
• Interface with the Circuit Design team at Onsite.
• Proficiency in using industry standard EDA tools like Cadence (Virtuoso‑L, Virtuoso‑XL, PVS & QRC), Mentor Graphics (Calibre & XRC), Hercules.

Additional Information