Manager, Tegra Software Chip

NVIDIA Gruppe; Santa Clara (CA); On-site; USD 184,000 - 287,500; Full time

Benefits offered by this job

Equity options

Benefits package

Job summary

NVIDIA Gruppe is seeking an experienced SW project management leader in Santa Clara, California, to drive the entire silicon life cycle for our Tegra chips across various sectors including Automotive and Data Center. This role involves coordinating complex SW planning and execution while leading diverse teams.

The ideal candidate will hold a Bachelors or Master’s in a relevant field and have over 5 years of industry experience, including 2 years in a managerial position. Key responsibilities include driving cross-team coordination and ensuring compliance with safety standards.

Qualifications

• 5+ years of experience with at least 2+ years in management roles.
• Deep understanding of software development and embedded systems.
• Proven experience in leading SW for Automotive, Data Center or Mobile SOCs.

Responsibilities

• Lead all aspects of Tegra chips SW planning and execution.
• Coordinate cross-team activities for joint debug.
• Drive simulation and emulation planning and schedules.

Skills

SW development life cycle

Embedded systems architecture

SW Technical program management

Project scheduling

Communication skills

Education

Bachelors or master’s in computer/Electronics engineering

Job description

NVIDIA is seeking an experienced SW project management leader to help us define, build and execute a chip through the entire silicon life cycle for use in various products (Automotive, Data Center, Embedded and Mobile).

For two decades, NVIDIA has pioneered visual computing, the art and science of computer graphics. With our invention of the GPU we also set the stage for advances in the field of robotics, computer vision and artificial intelligence. Today NVIDIA is building a platform and solutions for Data Centers, Robotics and Autonomous Machines.

What you’ll be doing:

• Lead and execute all aspects of Tegra chips SW planning and execution – coordinate the SW POR, pre‑silicon development, pre‑silicon SW validation, bring‑up and productization.
• Identify and drive all technical, logistical or resource related activities including running complex project schedules, removing roadblocks and meeting all silicon milestones.
• Coordinate and drive cross‑team activities that require complex joint debug between SW and HW teams.
• Drive the simulation and emulation POR, planning and schedule – work closely with Simulation and Emulation teams to build a prioritized plan and schedule for the project.
• Ensure teams are providing all needed collaterals for the SW Product Life Cycle development process. Also drive teams to develop software for compliance to various Safety standards.
• Act as the focal point, schedule and lead status meetings, handle communication of progress/status within/across all SW teams across multiple geographic locations.
• Partner closely with platform teams to define, prioritize, and execute bring‑up of their custom requirements.
• Act as the primary interface to Auto, Data Center, Embedded and Mobile SW groups for all chips related issues and communication.

What we need to see:

• Bachelors or master’s degree in computer/Electronics engineering or related field (or equivalent experience)
• 5+ overall years of proven experience in related areas with at least 2+ years of management experience
• Deep understanding of the SW development life cycle
• Proven SW Technical program management background in a matrix organization
• Strong understanding of embedded systems architecture: CPU, memory, buses and interconnects, Operating Systems and device drivers

Ways to stand out from the crowd:

• Proven track record in leading SW for Automotive, Data Center and Mobile SOCs
• Experience in Pre‑Silicon/Post‑Silicon bring‑up of complex SoC
• Strong understanding of Safety standards such as ISO26262 and Experience in delivering Safety compliant software.
• Experience in design and development of Kernel, System Software or drivers
• Strong understanding of silicon validation and characterization process and SOC micro‑architecture

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 184,000 USD – 287,500 USD for Level 2, and 224,000 USD – 356,500 USD for Level 3.

You will also be eligible for equity and benefits.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.