Manager Systems Design and Architecture

Micron Technology

Richardson (TX)

On-site

USD 130,000 - 160,000

Full time

14 days+

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Job summary

Micron Technology in Richardson, Texas, seeks a Manager for the Architecture and Hardware team. This role requires a leader to manage engineers focused on advanced memory and storage technologies, AI infrastructure, and system-level architecture.

The ideal candidate will have a strong background in hardware design and experience in leading technical teams. We look forward to those who want to drive innovation in next-generation memory systems.

Qualifications

  • 10+ years of experience in systems architecture, hardware design, and AI infrastructure.
  • Proven experience leading senior technical teams and engineering programs.
  • Deep understanding of memory hierarchies and system-level performance analysis.

Responsibilities

  • Lead system-level evaluations and prototyping for advanced memory technologies.
  • Define requirements and methodologies for performance and scalability.
  • Manage and mentor a team of senior engineers.

Skills

System-level architecture
Hardware design
AI infrastructure
Performance analysis
Deep understanding of memory and storage systems

Education

Bachelor's degree in relevant field

Tools

FPGA-based prototyping
Electrical debug

Job description

Overview

As the Manager of the Architecture and Hardware team in Micron’s Storage and Memory Systems (SMS) group within TPG Pathfinding, you will lead a multidisciplinary team of engineers responsible for system‑level architecture, hardware prototyping, and applied research for next‑generation memory and storage technologies. The role combines people management, technical leadership, external collaboration, and program execution across advanced memory storage systems, AI infrastructure, and hardware‑accelerated prototypes.

Responsibilities
  • Lead system‑level architecture evaluation, prototyping, and pathfinding for advanced memory and storage technologies (CXL, DDR/LPDDR, HBM, NVMe, emerging/disaggregated memory), including FPGA‑based controller emulation and AI infrastructure prototypes.
  • Define requirements, success metrics, and experimental methodologies for performance, cost, power, and scalability tradeoffs; perform architecture impact analysis in response to competitive threats.
  • Partner with Software and Applications Modeling teams to connect architectural concepts to real AI workloads and foster cross‑team collaboration within SMS and across TPG product groups.
  • Own technical execution for multi‑year internal and externally funded programs, including milestones, deliverables, and reviews; oversee system procurement, integration, lab bring‑up, validation, and operational readiness.
  • Engage with internal and external partners, vendors, research organizations, and industry standards bodies; support executive‑level briefings, roadmap discussions, and team strategy sessions.
  • Manage, mentor, and develop a team of senior engineers across hardware, systems architecture, RTL/FPGA, board design, and system validation; strategically grow team capabilities in AI system architecture, memory and I/O protocols, performance/power/TCO modeling, and advanced packaging and interconnect system impact.
  • Own resource planning, staffing allocation, budgets, and purchase approvals; ensure lab safety, compliance, and operational continuity.
Minimum Qualifications
  • Bachelor’s degree in electrical engineering, Computer Engineering, Computer Science, or related field (Master’s or PhD preferred) and 10+ years of experience in systems architecture, hardware design, storage, memory, or AI infrastructure.
  • Proven experience leading and managing senior technical teams and complex engineering programs, preferably in a pathfinding or advanced R&D organization.
  • Deep understanding of memory hierarchies, storage systems, and system‑level performance analysis, with technologies such as HBM, DDR/LPDDR, SSDs and NAND.
  • Working knowledge of AI compute and storage system architectures, including xPU (GPU, CPU, DPU, accelerator) memory‑storage hierarchy interactions.
  • Strong written and verbal communication skills, including executive‑level technical presentations.
  • Ability to work effectively in an environment with significant ambiguity and rapidly evolving priorities.
Preferred Qualifications
  • Experience with FPGA‑based prototyping, hardware emulation, RTL/Verification flows, board‑level development, electrical debug, and lab bring‑up.
  • Experience with system‑level performance modeling (bandwidth, latency, queueing, utilization, trace‑based analysis), power/energy/TCO modeling, advanced packaging and interconnect technology evaluation.
  • Experience with government‑funded research programs or national laboratories, and active participation in industry standards bodies (JEDEC, UCIe, SNIA, NVMe, PCI‑SIG, etc.), with a demonstrated ability to bridge research, engineering, and product strategy.
  • Experience integrating AI tools into engineering workflows to improve team productivity.
Equal Opportunity Employer

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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