Manager, System Level Performance Attainment

AMD

United States

On-site

USD 180,000 - 240,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Job summary

AMD is seeking a Manager of Silicon Design Engineering to own end-to-end silicon performance and design execution within the Server Performance Group. You will lead cross-functional teams across architecture, RTL, verification, firmware, and software to ensure targets are met.

This role directly impacts product competitiveness and long-term silicon roadmap, requiring technical leadership, pursuit of power and efficiency, and a track record of delivering complex SoCs and accelerators.

Qualifications

  • Extensive experience in silicon design engineering, post-silicon performance optimization, performance architecture, or related technical domains.
  • Deep understanding of SoC architecture and silicon debug.
  • Proven experience leading engineering teams.
  • Strong cross functional leadership and communication skills.
  • Demonstrated ability to drive complex technical programs from concept through post silicon execution.
  • Experience with high performance compute, CPUs, or largescale SoCs.
  • Background in both hardware and system/software performance optimization.

Responsibilities

  • Own system level performance attainment and HW/SW optimization to improve out of box and sustained performance across silicon products.
  • Lead post-silicon debug, regression, performance analysis, and optimization efforts to achieve committed product targets.
  • Establish and evolve methodologies for power and performance modeling, validation, and siliconbring up.
  • Lead execution across silicon programs, ensuring performance and power goals are met on schedule.
  • Partner closely with architecture, RTL design, verification, firmware, system software, and product management teams.
  • Identifyand mitigate technical and execution risks across the silicon lifecycle.
  • Drive continuous improvement in tools, flows, and best practices for silicon design and performance engineering.
  • Lead a team of silicon design and performance engineers.
  • Set clear technical direction, performance expectations, and career development paths for the organization.
  • Foster a culture of technical excellence, accountability, and collaboration.
  • Represent silicon design and performance perspectives in executive reviews and customer engagements.

Skills

Silicon design
SoC architecture
Post-silicon optimization
Engineering leadership
Cross-functional leadership
Hardware/software performance
CPUs / HPC

Education

Bachelor's or master's degree in electrical or computer engineering

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE

The Manager of Silicon Design Engineering is responsible for owning end to end silicon (i.e., pre – post silicon) performance and design execution as part of the Server Performance Group. This role provides technical and organizational leadership for system‑level performance attainment, hardware/software optimizations, silicon debug, and sustained performance delivery for complex SoCs and accelerators. The Manager drives cross functional alignment across architecture, modeling, design, validation, software, and product teams to ensure performance, power, and efficiency targets are met for current and future products.

Direct impact on product competitiveness, customer performance outcomes, and long‑term silicon roadmap success.

KEY RESPONSIBILITIES
Technical Leadership
  • Own system level performance attainment and HW/SW optimization to improve out of box and sustained performance across silicon products.
  • Lead post‑silicon debug, regression, performance analysis, and optimization efforts to achieve committed product targets.
  • Establish and evolve methodologies for power and performance modeling, validation, and siliconbring up.
Execution & Delivery
  • Lead execution across silicon programs, ensuring performance and power goals are met on schedule.
  • Partner closely with architecture, RTL design, verification, firmware, system software, and product management teams.
  • Identifyand mitigate technical and execution risks across the silicon lifecycle.
  • Drive continuous improvement in tools, flows, and best practices for silicon design and performance engineering.
People & Organizational Leadership
  • Lead a team of silicon design and performance engineers.
  • Set clear technical direction, performance expectations, and career development paths for the organization.
  • Foster a culture of technical excellence, accountability, and collaboration.
Cross Functional& External Engagement
  • Represent silicon design and performance perspectives in executive reviews and customer engagements.
PREFERRED EXPERIENCE:
  • Extensive experience in silicon design engineering, post‑silicon performance optimization, performance architecture, or related technical domains.
  • Deep understanding of SoC architecture and silicon debug.
  • Proven experience leading engineering teams.
  • Strongcross functionalleadership and communication skills.
  • Demonstrated ability to drive complex technical programs from concept throughpost siliconexecution.
  • Experience with high performance compute, CPUs, or largescale SoCs.
  • Background in both hardware and system/software performance optimization.
ACADEMIC CREDENTIALS:
  • Bachelor’s or master’sdegree in electrical or computer engineering

This role is not eligible for visa sponsorship.

#LI-RL1

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Manager, System Level Performance Attainment
Manager, System Level Performance Attainment

Advanced Micro Devices • Austin (TX)

On-site
USD 130,000 - 180,000
Senior Director, Data Center GPU Performance Architecture
Senior Director, Data Center GPU Performance Architecture

Advanced Micro Devices • Santa Clara (CA)

On-site
USD 250,000 - 350,000
Power and Performance Architect
Power and Performance Architect

Advanced Micro Devices • Austin (TX)

Hybrid
USD 120,000 - 150,000
Comprehensive benefits
Hybrid work model
System Performance Lead
System Performance Lead

Advanced Micro Devices • Austin (TX)

On-site
USD 120,000 - 170,000
AMD benefits
Principal Performance Modeling Engineer
Principal Performance Modeling Engineer

Advanced Micro Devices, Inc. • Santa Clara (CA)

On-site
USD 130,000 - 160,000
AMD benefits at a glance
Sr. Staff Engineer – Post-Silicon Power & Performance Attainment
Sr. Staff Engineer – Post-Silicon Power & Performance Attainment

Advanced Micro Devices • Austin (TX)

Hybrid
USD 190,000 - 240,000
AMD benefits at a glance
Principal Performance Modeling Engineer
Principal Performance Modeling Engineer

AMD • Santa Clara (CA)

On-site
USD 120,000 - 170,000
Reasonable accommodations for disabilities
Diverse and inclusive workplace
Principal Performance Architect
Principal Performance Architect

Advanced Micro Devices • Austin (TX)

Hybrid
USD 120,000 - 160,000
Senior Post-Silicon Power & Performance Attainment Engineer
Senior Post-Silicon Power & Performance Attainment Engineer

AMD • Austin (TX)

Hybrid
USD 140,000 - 190,000
Power and Performance Systems Design Engineer
Power and Performance Systems Design Engineer

Advanced Micro Devices • Austin (TX)

On-site
USD 120,000 - 160,000