Manager, DRAM Final Test Applications Engineering (Memory Test; San Jose, CA)

Teradyne; San Jose (CA); Hybride; USD 190 000 - 304 000; Plein temps

Résumé du poste

Teradyne is seeking a Manager for DRAM Final Test Applications Engineering in San Jose, CA. You will lead a global team delivering advanced DRAM production test solutions and partner across engineering, product management, and sales to shape future memory test roadmaps.

The role requires extensive DRAM test experience, leadership of cross-functional teams, and strong debugging and test-methodology skills. On-site role with travel, offering a competitive compensation package.

Qualifications

• BSEE, MSEE, or related technical degree or equivalent experience.
• 15+ years of semiconductor test experience with memory products.
• 5+ years of engineering leadership experience managing technical teams or customer-facing groups.
• Proven success in customer product introductions, production ramps, and high-volume deployments.
• Deep DRAM final test expertise across DDR, LPDDR, and GDDR technologies.
• Strong hardware/software debug, test methodology development, and production deployment experience.

Responsabilités

• Lead, mentor, and develop a global team of Applications Engineers for DRAM final test.
• Set priorities, resource plans, and build organizational capability while recruiting top talent.
• Lead strategic customer engagements and critical escalations through device bring-up and ramps.
• Provide technical leadership for DRAM production test solutions and test methodology improvements.
• Collaborate with Engineering, Product Management, Marketing, and Sales to influence roadmaps.
• Represent customer requirements to support product strategy and business growth.
• Foster collaboration and knowledge sharing across the global applications organization.

Connaissances

C/C++

Leadership

Stakeholder management

Communication

Formation

BSEE, MSEE, or related technical degree

Outils

Nextest Magnum

Advantest

Description du poste

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Manager, DRAM Final Test Applications Engineering (Memory Test; San Jose, CA)

Date: Oct 2, 2026

Location: San Jose, CA, US

We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world!

We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive.

Our Purpose
TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supportedto innovate and learn something new every day.
We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team – one that makes better decisions, drives innovation and delivers better business results.

Teradyne's Memory Test Division is seeking an experienced Manager, DRAM Final Test Applications Engineering to lead a team of Applications Engineers supporting leading memory semiconductor manufacturers worldwide. In this role, you will drive the successful deployment of advanced DRAM production test solutions, lead strategic customer engagements, and partner across the organization to help shape the future of Teradyne's memory test business.

Responsibilities:

• Lead, mentor, and develop a team of Applications Engineers supporting global DRAM customers.
• Establish team priorities, resource plans, and organizational capabilities while recruiting, developing, and retaining top engineering talent.
• Lead strategic customer engagements, critical technical escalations, device bring-up activities, and production ramps to ensure customer success.
• Provide technical leadership for advanced DRAM production test solutions, driving best practices in test methodology development, characterization, yield improvement, and production deployment.
• Partner with Engineering, Product Management, Marketing, and Sales teams to influence future hardware and software roadmaps.
• Represent customer requirements and industry trends to support product strategy, innovation, and business growth.
• Foster collaboration, knowledge sharing, and operational excellence across the global applications organization.

All About You

We seek individuals who share our passion and determination. Our commitment to customer success drives us to go the extra mile. If you're ready to join us in this mission, take a closer look at the minimum criteria for the position.

Minimum Qualifications

• BSEE, MSEE, or related technical degree, or equivalent industry experience.
• 15+ years of semiconductor test experience with a strong focus on memory products.
• 5+ years of engineering leadership experience managing technical teams, projects, or customer-facing engineering organizations.
• Demonstrated success supporting customer product introductions, production ramps, and high-volume manufacturing deployments.
• Proven experience leading complex technical escalations and strategic customer engagements.
• Deep expertise in DRAM final test methodologies, high-volume manufacturing, and production test deployments supporting DDR, LPDDR, and GDDR memory technologies.
• Strong understanding of high-speed memory interfaces, signal integrity, timing analysis, jitter characterization, eye diagram evaluation, and tester-to-system correlation.
• Strong knowledge of device characterization, yield improvement, test coverage optimization, and production test methodologies.
• Strong hardware and software debug capabilities with experience developing and deploying automated production test solutions.
• Proficiency with C/C++ or comparable software development environments.
• Excellent communication, leadership, customer relationship, and stakeholder management skills.

Preferred Qualifications

• Experience with HBM, NAND Flash, and memory wafer sort test environments.
• Experience with Nextest Magnum, Advantest, or similar memory test platforms.
• Experience supporting AI, graphics, mobile, or high-performance computing memory products.
• Familiarity with advanced memory packaging technologies.
• Experience managing globally distributed engineering teams.

Additional Information

• Up to 25% domestic and international travel may be required.
• This is an on-site position located in San Jose, California.
• Candidates must be local to the San Jose area.

This position is not eligible for visa sponsorship.

We are unable to provide relocation assistance for this position

Compensation:
The base salary range for this role is$189,800 to 303,700.This range is a good faith estimate, and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location.

Incentive Plan: This job is eligible for discretionary bonus(es) based on financial performance.

Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more.

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Nearest Major Market: San Jose
Nearest Secondary Market: Palo Alto
Job Segment: Application Engineering, Testing, Electrical Engineering, Test Engineer, Engineering Manager, Engineering, Technology