Lead SOC Performance Architect: CPU Core Optimizations

AMD; United States; On-site; USD 150,000 - 230,000; Full time

Benefits offered by this job

Benefits at a glance

Job summary

AMD in Austin, TX seeks a hands-on leader to guide the Client SOC Performance team. You will steer architecture modeling, collaborate with CPU micro-architects and designers, and drive performance analysis across workloads to inform hardware and software optimizations.

You will manage cross-site engineers, develop analysis tools, and champion efficient workloads while maintaining a hands-on approach to mentoring and debugging post-silicon issues.

Qualifications

• Experience with computer system simulation and performance evaluation.
• Proficient with CPU microarchitecture, modeling, and simulator development.
• Experienced with x86 instruction set processors.
• Experience analyzing system bottlenecks and optimizing computing systems for performance.
• Proficient in C/C++ and Python.

Responsibilities

• Lead SOC Performance Architecture modeling and feature analysis for next generation SOCs.
• Work with CPU micro-architects and designers to optimize future CPU cores for Client workloads.
• Drive analysis of critical workloads leading to hardware and software optimizations.
• Determine competitive status and isolate weaknesses in our products for future improvement.
• Lead post-silicon debug/tuning efforts to ensure AMD processors are fully performance optimized.
• Carry out multi-discipline interactions with microprocessor architects, ISA owners, software optimizers, compiler team, logic designers, and verification engineers to identify, resolve and document architectural performance issues.

Skills

CPU microarchitecture

Modeling

Simulator development

C/C++

Python

Windows kernel

Education

Bachelor's/Master's/Ph.D. in Electronics/Computer Engineering or CS

Tools

CPU simulators

OS internals

Job description

AMD in Austin, TX seeks a hands-on leader to guide the Client SOC Performance team. You will steer architecture modeling, collaborate with CPU micro-architects and designers, and drive performance analysis across workloads to inform hardware and software optimizations.

You will manage cross-site engineers, develop analysis tools, and champion efficient workloads while maintaining a hands-on approach to mentoring and debugging post-silicon issues.