Lead Hardware Security Architect – AI Accelerators

Positron AI; United States; Remote; USD 200,000 - 300,000; Full time

Benefits offered by this job

Fully company-paid medical, dental, &

Company-paid life & disability

Unlimited paid time off

Remote-first culture with home office

401(k) with company matching

Job summary

Positron AI is building next-generation AI inference accelerators with a strong focus on security. This role leads the hardware security architecture across the product lifecycle, from design through deployment, safeguarding customer models, data, firmware, and device identity.

The position emphasizes secure boot, HSM/TPM readiness, threat modeling, and collaboration with firmware, software, and manufacturing teams to embed security into every layer of the accelerator platform.

Qualifications

• 12+ years of experience in hardware security architecture.
• Deep expertise in secure boot and hardware root of trust design.
• Strong cryptography and key management ability.
• Hands-on experience with secure manufacturing processes.
• Solid grasp of silicon bring-up in a security-critical context.

Responsibilities

• Define the overall silicon security architecture for Positron's platform.
• Own secure boot, hardware root of trust, chain of trust, authenticated firmware, and measured boot.
• Own secure debug, secure manufacturing, fuse programming, key provisioning, and device identity.
• Own key ladders, anti-rollback protections, JTAG security, scan access control, and lifecycle states.

Skills

Secure boot

Hardware security

Cryptography

Key management

Secure manufacturing

Silicon bring-up

Threat modeling

Tools

HSMs

TPMs

Arm TrustZone

PCIe security

CXL security

Job description

Positron AI is building next-generation AI inference accelerators with a strong focus on security. This role leads the hardware security architecture across the product lifecycle, from design through deployment, safeguarding customer models, data, firmware, and device identity.

The position emphasizes secure boot, HSM/TPM readiness, threat modeling, and collaboration with firmware, software, and manufacturing teams to embed security into every layer of the accelerator platform.