Lead FPGA Design Engineer – Spacecraft Avionics

Intuitive Machines, LLC; San Jose (CA); On-site; USD 123,000 - 251,000; Full time

Benefits offered by this job

Health insurance

401(k)

Job summary

Lanteris Space Systems is seeking an FPGA Design Engineer to join the Bus Electronics Design team in San Jose, CA. You will lead FPGA design for avionics systems, collaborating across hardware and software teams to deliver high‑reliability space hardware from concept to flight.

The role requires deep RTL experience, IP integration, and a hands‑on approach in a fast‑paced environment with rigorous validation and qualification processes.

Qualifications

• Must be a U.S. citizen or permanent resident.
• Bachelor’s degree in electrical engineering, computer science, or a related field.
• 8+ years FPGA design experience.
• Proficiency in SystemVerilog and/or VHDL for RTL
• Proficiency in configuring IP and integrating 3rd party IP.
• Experience with FPGA synthesis, place-and-route, timing closures.

Responsibilities

• Provide technical leadership on FPGA design choices and system trades.
• Own FPGA development from concept through production and flight hardware.
• Ensure high performance and reliable FPGA designs with fault tolerance and timing closure.
• Collaborate with hardware and software teams for design bring‑up.
• Document test plans and validate hardware through environmental testing.
• Coordinate with cross‑functional teams to drive project success.

Skills

FPGA design

SystemVerilog/VHDL

RTL design

FPGA synthesis

fault tolerance

SerDes/SpaceWire

Education

Bachelor’s degree in electrical engineering or related

Tools

Xilinx Versal

Microchip RTAX/RTG4

Job description

Lanteris Space Systems is seeking FPGA Design Engineer to join our Bus Electronics Design team, with a focus on avionics hardware development. This is a hands‑on, on‑site position located in San Jose, CA.

The Bus Electronics team is responsible for the design, verification, and manufacturing support for the avionics, power, and analog electronics that enable our reputable, reliable, and high‑powered spacecraft. Our spacecraft span pLEO to deep space, enabling national defense, earth observation & communications, and interplanetary space exploration such as NASA’s Psyche Discovery Program and SR-1 Freedom mission to Mars.

In this role you will lead the FPGA design for our next‑gen avionics systems, including high speed communications, payload processing, data handling, memory blocks, sensor interfaces, etc. The successful FPGA Design Engineer will have strong experience in the full‑lifecycle implementation of reliable, digital designs, working effectively with both hardware and software design teams. This is an exciting opportunity to be the owner from concept through design implementation, qualification, production, and flight of avionics hardware for space applications.

Responsibilities:

• Provide technical leadership and make recommendations to system trades, requirements capture, part selection, and design choices and implications, in an often‑ambiguous design space.

• Proactive ownership of FPGA development through design, production, satellite integration, and on‑orbit performance.

• High performance and reliable FPGA designs, encompassing fault tolerance, timing closure, and high speed communications.

• Support design bring‑up with both hardware and software teams.

• Documentation of engineering test and qualification plans, execute hardware validation through benchtop and environmental testing, troubleshooting and root cause investigations of anomalous behaviors.

• Collaborate with entire cross‑functional team (digital, software, power, PCB layout, etc) to drive project success.

Minimum Requirements:

• Must be a U.S. citizen or permanent resident.

• Bachelor’s degree in electrical engineering, computer science, or a related field.

• 8+ years FPGA design experience.

• Proficiency in the design, implementation, and simulation for RTL in SystemVerilog and/or VHDL.

• Proficiency in configuring both hard and soft IP, writing custom IP, and integrating 3rd party IP.

• Experience with FPGA synthesis, place‑and‑route, multi‑clock architectures and timing closures.

• Experience with fault tolerance and SEE mitigation strategies such as TMR, ECC, and scrubbing.

• Experience interfacing with both hardware and software design teams, and selecting the appropriate FPGA/SoCs to meet current and future roadmap requirements.

Additional Desired Qualifications

• 15+ years FPGA design experience.

• Experience with multiple FPGA vendors/families such as AMD Xilinx Versal, Microchip RTAX/RTG4.

• Experience with prototyping bring up, test benches, and validation.

• Experience in FPGA designs for avionics systems in space, defense, or other high‑reliability systems.

• Experience with SerDes, SpaceWire, Ethernet, LVDS, RS-422/485.

• Experience with FPGA configuration management.

The base pay for this position at the Staff level within California is: $123,000.00 - $205,000.00 annually.

The base pay for this position at the Principal level within California is: $151,000.00 - $251,000.00 annually.

In support of pay transparency at Lanteris Space Systems, we disclose salary ranges on all U.S. job postings. The successful candidate’s starting pay will fall within the salary range provided below and is determined based on job‑related factors, including, but not limited to, the experience, qualifications, knowledge, skills, geographic work location, and market conditions. Candidates with the minimum necessary experience, qualifications, knowledge, and skillsets for the position should not expect to receive the upper end of the pay range.

• The base pay for this position within California is: $123,000.00 - $205,000.00 annually.

For all other states, we use geographic cost of labor as an input to develop market‑driven ranges for our roles, and as such, each location where we hire may have a different range.

We offer a comprehensive package of benefits including paid time off, health and welfare insurance, and 401(k) to eligible employees. More information on our benefits will be shared with candidates as they move forward in the recruitment process.

Additionally, this position is incentive eligible with a target based on contribution, company performance, and/or individual results achieved; the specific incentive plan and target amount will be determined based on the role and breadth of contributions.

The application window is three days from the date the job is posted and will remain posted until a qualified candidate has been identified for hire. If the job is reposted regardless of reason, it will remain posted three days from the date the job is reposted and will remain reposted until a qualified candidate has been identified for hire.

The date of posting can be found on the Lanteris Space Systems Career page at the top of each job posting.

Lanteris Space Systems values diversity in the workplace and is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected veteran status, age, or any other characteristic protected by law.