Intern - DRAM Test Structure Design and Layout Engineering

1000 Micron Technology, Inc.

Boise (ID)

On-site

USD 28,000 - 41,000

Full time

13 days ago
Application generator

Turn this role into an interview — a resume and cover letter built around what this employer wants.

Get past ATS filters

Benefits offered by this job

Medical, dental, and vision plans
Paid time off
Equal opportunity employer

Job summary

Micron Technology is seeking a highly motivated Engineering Intern to join the DRAM Build Enablement and Test Structure Engineering team. You will have the outstanding opportunity to contribute to the development, layout, verification, and analysis of semiconductor test structures used to characterize advanced DRAM technologies.

This position offers hands‑on experience with industry‑leading EDA tools, physical build methodologies, composition rule verification, and silicon evaluation techniques

Qualifications

  • Currently pursuing a Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Semiconductor Engineering, Physics, or related field.
  • Cannot graduate before September 2027.
  • Experience with coding or scripting languages such as Python, Tcl, or Perl.
  • Strong analytical and problem‑solving skills.
  • Good written and verbal communication skills.

Responsibilities

  • Contribute to the development and arrangement of semiconductor test structures (TEGs) for advanced DRAM technology nodes.
  • Support physical verification activities, including DRC, LVS, and predefined validation.
  • Engage in device, process, and test-structure simulation to evaluate build assumptions and correlate with silicon data.
  • Develop and analyze test structures for device characterization, process monitoring, and technology qualification.
  • Write automation scripts in Python, Tcl, or related languages to improve engineering efficiency.

Skills

Python
Tcl
Perl

Education

Bachelor's or higher in Electrical/Computer/Semiconductor Engineering or Physics

Tools

Cadence Virtuoso
Calibre

Job description

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology is seeking a highly motivated Engineering Intern to join the DRAM Build Enablement and Test Structure Engineering team. You will have the outstanding opportunity to contribute to the development, layout, verification, and analysis of semiconductor test structures used to characterize advanced DRAM technologies. This position offers hands‑on experience with industry‑leading EDA tools, physical build methodologies, composition rule verification, and silicon evaluation techniques used in next‑generation memory development.

Responsibilities
  • Contribute to the development and arrangement of semiconductor test structures (TEGs) for advanced DRAM technology nodes.
  • Support physical verification activities, including DRC, LVS, and predefined validation.
  • Engage in semiconductor device, process, and test‑structure simulation activities to evaluate build assumptions, predict electrical behavior, and correlate simulation results with silicon characterization data.
  • Develop and analyze test structures for device characterization, process monitoring, and technology qualification.
  • Apply layout databases and EDA tools to build, modify, and verify composed data.
  • Perform data analysis on electrical characterization results and generate technical reports.
  • Write automation scripts in Python, Tcl, or related programming languages to increase engineering efficiency.
  • Explore AI‑assisted and AI‑augmented engineering workflows, including the responsible use of large language models (LLMs) to support automation, documentation, data analysis, and productivity improvement.
  • Collaborate with technology development, process integration, device engineering, and characterization teams to support project objectives.
  • Participate in build reviews, technical discussions, and problem‑solving activities related to semiconductor development.
  • Document methodologies, results, and guidelines for future technology projects.
Minimum Qualifications
  • Currently pursuing a Bachelor's or equivalent experience, Master's or equivalent experience, or PhD degree or equivalent experience in Electrical Engineering, Computer Engineering, Semiconductor Engineering, Physics, or a related Engineering field.
  • Cannot graduate prior to September 2027.
  • Basic understanding of semiconductor devices and coordinated circuit fundamentals.
  • Experience with coding or scripting languages such as Python, Tcl, or Perl.
  • Strong analytical and problem‑solving skills.
  • Good written and verbal communication skills.
Preferred Qualifications
  • Coursework or project experience in VLSI build, semiconductor processing, or device physics.
  • Experience with EDA tools such as Cadence Virtuoso, Calibre, or equivalent.
  • Hands‑on experience editing semiconductor layout using EDA tools, including crafting, modifying, and reviewing layout data for design‑rule compliance.
  • Understanding of physical build verification concepts including DRC and LVS.
  • Experience with data analysis and visualization tools.

Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time‑off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Intern - DRAM Test Structure Design and Layout Engineering
Intern - DRAM Test Structure Design and Layout Engineering

Micron • Boise (ID)

On-site
USD 28,000 - 41,000
Medical, dental, vision plans
Paid time off
Paid holidays
Intern - DRAM Test Structure Design and Layout Engineering
Intern - DRAM Test Structure Design and Layout Engineering

Micron Technology, Inc • Boise (ID)

On-site
USD 28,000 - 41,000
Intern - DRAM Test Structure Design and Layout Engineering
Intern - DRAM Test Structure Design and Layout Engineering

Micron Technology • Boise (ID)

On-site
USD 28,000 - 41,000
Medical, dental and vision plans
Paid time off
Paid holidays
Intern - DRAM Test Structure Design and Layout Engineering Boise, Idaho, United States of America Posted a day ago
Intern - DRAM Test Structure Design and Layout Engineering Boise, Idaho, United States of America Posted a day ago

Micron Technology, Inc • Boise (ID), Northern (KY)

Hybrid
USD 25,000 - 39,000
Medical/Dental/Vision plans
Paid family leave
Paid time off
+1
Intern - DRAM Design Rules
Intern - DRAM Design Rules

Micron Technology, Inc • Boise (ID)

On-site
USD 28,000 - 48,000
Intern - DRAM Technology DTCO & PPA Assessment Engineer
Intern - DRAM Technology DTCO & PPA Assessment Engineer

Micron • Boise (ID)

On-site
USD 34,000 - 48,000
Medical, dental and vision plans
Paid time off
Paid holidays
Intern - DRAM Product Test Engineer
Intern - DRAM Product Test Engineer

Micron Technology, Inc • Boise (ID)

On-site
USD 85,000 - 120,000
Medical, dental and vision plans
Paid time off
Paid holidays
Intern - DRAM Technology DTCO & PPA Assessment Engineer
Intern - DRAM Technology DTCO & PPA Assessment Engineer

Socket.dev • Boise (ID)

On-site
USD 27,552,000 - 55,104,000
Medical/Dental/Vision
Paid time off
Paid holidays
Intern - DRAM Design Engineer
Intern - DRAM Design Engineer

Socket.dev • Boise (ID)

On-site
USD 34,000 - 48,000
Intern - Advanced DRAM Cell & Device Technology
Intern - Advanced DRAM Cell & Device Technology

Micron • Boise (ID)

On-site
USD 34,000 - 55,000
Medical/Dental/Vision
Paid time off
Paid holidays